MIC-6314 User Manual
6
1.2.16
PCIE Bridge
MIC-6314 uses a PLX PEX8733 component, a 32-lane, 8-port, Gen 3 PCIe switch
device as a gateway for intelligent subsystems. When configured as a system con-
troller, the bridge acts as a standard transparent PCI Express bridge. MIC-6314
receives power from the backplane and supports rear I/O. The PLX PEX8733 com-
ponent offers the following features:
PCIe interface:
–
PCI Express Base Specification, r3.0
Supports transparent and non-transparent operation modes
Supports forward and reverse bridging
End-to-end CRC (ECRC) and Poison bit support
Failover support, can be configured for 1+1 redundancy or N+1 redundancy
Please consult the PLX PEX8733 data book for details.
1.2.17
I/O Connectivity
The MIC-6314’s front panel I/O is provided by two RJ45 Gigabit Ethernet ports, one
RJ45 COM port, two USB 3.0 ports, one USB 2.0, one DVI connector, and one XMC/
PMC knockout.
The onboard I/O consists of one SATA channel that can be connected to a daughter
board or a CFast slot. Rear I/O connectivity is available via the following VPX con-
nectors:
P1: Two PCIe x8
P2: Two PCIe x8
P4: XMC I/O, GPIO, two lanes of GbE or SerDes
P5: Four SATA ports (3 SATA III ports and one SATA II port), two COM ports,
two DVI ports, two USB 2.0, and two USB 3.0
P6: Two GbE, five USB 2.0, keyboard/mouse, two COM ports, Line-In, Line-Out,
and Mic
Please refer to the appendix for detailed pin definitions.
1.2.18
XMC (Switched Mezzanine Card) VITA 42 Compliant
Additional I/O or co-processing functionality is supported by add-on PMC modules.
MIC-6314 supports one XMC site that is fully compliant with the VITA 46.9 PMC/XMC
Rear I/O Fabric Signal Mapping on 3U and 6U VPX Modules Standard specification.
The two-layer front panel design complies with IEEE 1101.10. All connectors are
firmly screwed to the front panel, and a shielding gasket is attached to the panel
edge, reducing emissions and increasing protection from external interference.
Front Panel
Main On-board Features
Part Number
Display
USB
Ethernet
(RJ45)
Console
(RJ45)
CPU
SODIMM
Socket
MIC-6314-A1A4E
DVI x1
2.0x1;
3.0x2
2
1
I7-5850EQ
Yes
MIC-6314-A2A4E
DVI x1
2.0x1;
3.0x2
2
1
I7-5850EQ
Yes
MIC-6314-B1C4E
VGA x1
3.0x2
0
0
i5-4402E
No
Содержание MIC-6314 Series
Страница 1: ...User Manual MIC 6314 OpenVPX 6U CPU Blade with 4th 5th Gen Intel Xeon E3v4 Core Processor...
Страница 13: ...Chapter 1 1 Hardware Configuration This chapter explains how to configure the MIC 6314 hardware...
Страница 30: ...MIC 6314 User Manual 18...
Страница 31: ...Chapter 2 2 AMI APTIO BIOS Setup This chapter describes how to configure the AMI APTIO BIOS UEFI BIOS...
Страница 61: ...Chapter 3 3 BMC Firmware Operation This chapter describes the BMC firmware features...
Страница 86: ...MIC 6314 User Manual 74...
Страница 87: ...Chapter 4 4 HPM 1 Update This chapter explains how to update the software firmware components...
Страница 95: ...Appendix A A Pin Assignments This appendix describes the pin assignments...
Страница 106: ...MIC 6314 User Manual 94...
Страница 107: ...Appendix B B Programming the Watchdog Timer This appendix describes how to program the watchdog timer...
Страница 109: ...Appendix C C I O Controller List...
Страница 111: ...Appendix D D Glossary...
Страница 114: ...MIC 6314 User Manual 102...
Страница 115: ...Appendix E E BIOS Checkpoint...
Страница 122: ...MIC 6314 User Manual 110...
Страница 123: ...Appendix F F IPMI PICMG Command Subset Supported by BMC...
Страница 133: ...Appendix G G Drivers and Tools...
Страница 135: ...123 MIC 6314 User Manual Appendix G Drivers and Tools...