Advantech MIC-6314 Series, Руководство пользователя

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MIC-6314 User Manual x
3.5.9 Load Default Configuration OEM Command .............................. 65
3.5.10 Swap BIOS Banks OEM Command ........................................... 66
3.5.11 Graceful Shutdown Timeout OEM Command ............................ 66
3.6 UART and UART Multiplexer .................................................................. 67
3.6.1
UART Block Diagram.................................................................. 67
Figure 3.2 UART functional block overview............................... 67
3.7 ACPI........................................................................................................ 67
3.7.1
ACPI-Featured Graceful Shutdown ............................................ 67
3.7.2 Graceful Shutdown Timeout ....................................................... 67
3.8 BIOS Failover/Redundancy .................................................................... 68
3.8.1
Overview..................................................................................... 68
3.8.2 BIOS Boot Watchdog.................................................................. 68
3.9 Supported Watchdogs ............................................................................ 68
3.9.1
Firmware Watchdog.................................................................... 68
3.9.2 BMC Watchdog........................................................................... 68
3.10 Resets..................................................................................................... 69
3.10.1 Baseboard Management Controller Resets................................ 69
3.10.2 Payload Reset ............................................................................ 69
3.11 Serial Over LAN Setup............................................................................ 70
3.11.1 Preconditions for SOL................................................................. 70
3.11.2 LAN Configuration with IPMItool................................................. 70
3.11.3 SOL Session with IPMItool ......................................................... 72
Chapter 4 HPM.1 Update .................................... 75
4.1 HPM.1 Preconditions .............................................................................. 76
4.1.1
IPMItool....................................................................................... 76
4.1.2 Interfaces .................................................................................... 76
4.2 BMC Bootloader Upgrade....................................................................... 77
4.2.1
Load New BMC Bootloader Image ............................................. 77
4.2.2 Activate BMC Bootloader............................................................ 77
4.3 BMC Firmware Upgrade ......................................................................... 78
4.3.1
Load New BMC Firmware Image................................................ 78
4.3.2 Activate BMC Firmware .............................................................. 78
4.4 FPGA configuration upgrade .................................................................. 79
4.4.1
Load new FPGA image............................................................... 79
4.4.2 Activate FPGA configuration....................................................... 79
4.5 BIOS Upgrade......................................................................................... 80
4.5.1
Load New BIOS Image ............................................................... 80
4.5.2 Activate BIOS Image .................................................................. 81
4.6 Verify Successful Upgrades.................................................................... 82
Appendix A Pin Assignments ............................... 83
A.1 P0 Connector .......................................................................................... 84
Table A.1: P0 VPX I/O ............................................................... 84
A.2 P1 Connector .......................................................................................... 85
Table A.2: P1 VPX I/O ............................................................... 85
A.3 P2 Connector .......................................................................................... 86
Table A.3: P2: I/O ...................................................................... 86
A.4 P3 Connector (Reserved) ....................................................................... 87
Table A.4: P3 VPX I/O ............................................................... 87
A.5 P4 Connector .......................................................................................... 88
Table A.5: P4 VPX I/O ............................................................... 88
A.6 P5 Connector .......................................................................................... 89
Table A.6: P5 VPX I/O ............................................................... 89
A.7 P6 Connector .......................................................................................... 90
Table A.7: P6 VPX I/O ............................................................... 90
A.8 Additional Connectors............................................................................. 91