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MIC-6314 User Manual

Chapter 1

H

ardware

C

onfiguration

1.2

Specifications

1.2.1

OpenVPX Interface

MIC-6314 is compliant with the OpenVPX MOD6-PAY-4F1Q2U2T-12.2.1-2 profile.
Two lanes of PCEI x 8 are provided in the P1 dataplane. Another two lanes of PCIe
x8 are routed to the P2 expansion plane. All of these PCIE lanes come from a gen. 3
PCIE switch respectively. Please contact the Advantech representatives for the differ-
ent configuration availability. Two lanes of 1GBase-T (can be configured to SerDes
upon request) are employed for the P4 control plane. Another two lanes of 1GBase-T
are routed to the P6 user define plane.

1.2.2

CPU

MIC-6314 supports Intel

®

Xeon

®

E3Lv4 and Core™ i5-4402E processors, with clock

frequencies of up to 3.4 GHz. The Intel

®

Xeon

®

E3Lv4 processor is integrated with

the Intel® Iris™ Pro Graphics P6300 embedded graphics controller that supports
OpenGL 4.3, DirectX 11.2, and OpenCL 2.0 for enhanced 3D graphics processing.
Moreover, the Intel

®

Xeon

®

E3Lv4 processor is equipped with Intel

®

Turbo Boost

Technology 2.0, which activates automatically when the OS requests the highest pro-
cessor performance state.

Meanwhile, the 4th Gen Intel

®

Core™ i5-4402E processor offers a two-fold improve-

ment in performance compared to that of the previous generation. Finally, the inclu-
sion of Intel

®

HT Technology enables MIC-6314 to execute multiple demanding

applications simultaneously, while maintaining system responsiveness.

1.2.3

Processor

The Intel® i7-5850EQ processor is the default for the air-cooled MIC-6314 SKU
(MIC-6314-A series with i7-5850EQ), whereas the Intel® Core™ i5-4402E processor
is the default for the conduction-cooled MIC-6314 SKU (MIC-6314-B series).
Please contact your distributor or local Advantech representative for information
regarding the availability of other Xeon® E3Lv4 or 4th/5th Gen Core™ SKUs.

1.2.4

BIOS

MIC-6314 features an 8 Mbyte SPI flash containing a board-specific BIOS (from AMI)
designed to meet industrial and embedded system requirements.

Table 1.2: Processor Type

Intel CPU
Model Number

CPU
architecture

# cores Graphic Engine Freq.

Cache DMI

CPU
TDP

i7-5850EQ

Broadwell
(14nm)

4

Intel® Iris™ Pro
Graphics P6200

3.4GHz
(max)

6MB

5 GT/s 47W

i5-4402E

Haswell
(22nm)

2

Intel® HD Graph-
ics 4600

2.7 GHz 3 MB

5 GT/s 25W

Note!

Because power consumption and thermal restrictions vary between dif-
ferent VPX systems, please double check these items before installing a
higher speed CPU not specified in the table above.

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Содержание MIC-6314 Series

Страница 1: ...User Manual MIC 6314 OpenVPX 6U CPU Blade with 4th 5th Gen Intel Xeon E3v4 Core Processor...

Страница 2: ...Advantech assumes no liability under the terms of this warranty as a consequence of such events Because of Advantech s high quality control standards and rigorous testing most customers never need to...

Страница 3: ...ment in a residential area is likely to cause harmful interference In such cases users are required to correct the interference at their own expense FM This equipment has passed the FM certification A...

Страница 4: ...and PCH heat sink included 1 x storage carrier 2 5 hard drive SSD or M 2 assembled 1 x Solder side cover assembled 1 x RJ45 to DB9 cable 1 x Warranty certificate Safety Warnings CE FCC class A Warning...

Страница 5: ...uid into an opening This may cause fire or electrical shock 13 Never open the equipment For safety reasons the equipment should be opened only by qualified service personnel 14 If one of the following...

Страница 6: ...any components on the CPU card or other cards while the PC is powered on Disconnect the power before making any configuration changes The sudden rush of power as a jumper is connected or a card insta...

Страница 7: ...7 1 2 23 BMC 7 1 3 Functional Block Diagram 8 Figure 1 1 MIC 6314 functional block diagram 8 1 4 Board Map 9 Figure 1 2 Board map 9 1 5 Jumpers and Switches 9 Table 1 3 MIC 6314 Jumper Description 9 T...

Страница 8: ...een 23 Table 2 3 Serial Console Settings 23 Figure 2 5 USB configuration screen 26 Table 2 4 USB Configuration 26 Figure 2 6 Trusted computing screen 27 Table 2 5 Trusted Computing 27 Figure 2 7 Virtu...

Страница 9: ...List 52 Table 3 1 Sensor List 52 3 3 2 Threshold Based Sensors 53 Table 3 2 Threshold Descriptions 53 Table 3 3 Voltage Sensor List 53 Table 3 4 Temperature Sensor List 54 3 3 3 Discrete Sensors 54 T...

Страница 10: ...SOL Session with IPMItool 72 Chapter 4 HPM 1 Update 75 4 1 HPM 1 Preconditions 76 4 1 1 IPMItool 76 4 1 2 Interfaces 76 4 2 BMC Bootloader Upgrade 77 4 2 1 Load New BMC Bootloader Image 77 4 2 2 Acti...

Страница 11: ...105 E 2 2 PEI Phase 105 E 2 3 DXE Phase 107 E 3 ACPI ASL Checkpoints 109 E 4 OEM Reserved Checkpoint Ranges 109 Appendix F IPMI PICMG Command Subset Supported by BMC111 F 1 Standard IPMI Commands v2...

Страница 12: ...ual xii F 2 1 AdvancedTCA PICMG 3 0 R3 0 Base Specification 119 F 2 2 HPM 1 R1 0 120 F 3 OEM Group IPMI Commands 120 F 3 1 Advantech OEM Commands 120 Appendix G Drivers and Tools 121 G 1 OpenIPMI 122...

Страница 13: ...Chapter 1 1 Hardware Configuration This chapter explains how to configure the MIC 6314 hardware...

Страница 14: ...for maximum reliability and a SSD socket is also available for a cost efficient modular storage By using Intel s powerful PCH Lynx Point with its advanced SATA controller the MIC 6314 offers high sto...

Страница 15: ...state Meanwhile the 4th Gen Intel Core i5 4402E processor offers a two fold improve ment in performance compared to that of the previous generation Finally the inclu sion of Intel HT Technology enable...

Страница 16: ...et lanes are provided to P4 and P6 with I350AM4 Front I O RJ45 Backplane To configure the two P4 lanes of Ethernet to SerDes contact your local Advantech representative for assistance 1 2 8 Storage In...

Страница 17: ...This function is enabled by default in the SKU with IPMI management Should you require this func tion in the SKU without IPMI management please contact your local field service engineer or salesperson...

Страница 18: ...Fast slot Rear I O connectivity is available via the following VPX con nectors P1 Two PCIe x8 P2 Two PCIe x8 P4 XMC I O GPIO two lanes of GbE or SerDes P5 Four SATA ports 3 SATA III ports and one SATA...

Страница 19: ...ller provides BMC functionality to inter face between the system management software and platform hardware Full IPMI details are provided in Chapter 3 1 2 23 BMC The management firmware of MIC 6314 is...

Страница 20: ...2x 1GBase T SERDES opt USB 2 0 2x DVIx2 DVI x2 VGA optional to front panel or backplane to P5 From CPU PCIex8 XMC 8d 12d XMC IO SPI 8MB IPMB0 A B to P0 PCIe x 8 USB 2 0 SATAIII 6Gbps 1600 w ECC 1600...

Страница 21: ...rd SW3 PLX_SW2 JP1 UARTSW1 UARTSW I350 PLXSW3 CPU PLXSW4 PLX_SW5 Onboard memory FPGA CN2 PCIE switch PCIE switch RTC Battery PCH Table 1 3 MIC 6314 Jumper Description Number Function JP1 XMC VIO CN2 C...

Страница 22: ...system The BIOS is reset to its default settings 1 5 2 XMC VIO Setting JP1 This jumper is used for setting the XMC IO voltage Figure 1 3 JP11 for XMC VIO 5V or 12V 1 5 3 Switch Settings Table 1 5 CN2...

Страница 23: ...able 1 10 RIO COM RS232 RS485 RS422 Mode Selection COM1 to backplane is set to RS232 COM1 to backplane is set to RS485 COM1 to backplane is set to RS422 COM2 to backplane is set to RS232 COM2 to backp...

Страница 24: ...the COM port configuration but the setting will roll back to the FPGA default configuration at every boot up Table 1 11 SW3 Front COM and RTM COM1 COM2 Port Selection for BMC SIO UART Default Front CO...

Страница 25: ...e provides complete plug and play functionality as well as hot attach detach capability for up to 127 external devices The MIC 6314 USB interface complies with USB specifications R 3 0 and is fuse pro...

Страница 26: ...1 6 4 SATA Daughter Board Connector HDD Extension Module MIC 6314 provides one SATA interface via the HDD connector for a daughter card for a CFast card or optional onboard HDD Four SATA 3 0 x3 2 0 x1...

Страница 27: ...ins electro statically sensitive devices Please discharge your clothing before touching the assembly Do not touch components or connector pins Advantech recommends that you perform assembly at an anti...

Страница 28: ...MIC 6314 User Manual 16 Figure 1 6 Complete assembly of MIC 6314 convection with the M 2 daughter board Figure 1 7 Complete assembly of MIC 6314 ruggedized convection with the M 2 daughter board...

Страница 29: ...ive to inquire about support for other operating systems 1 11 Power consumption The following data provide the maximum continuous current based on Advantech s verification result These values include...

Страница 30: ...MIC 6314 User Manual 18...

Страница 31: ...Chapter 2 2 AMI APTIO BIOS Setup This chapter describes how to configure the AMI APTIO BIOS UEFI BIOS...

Страница 32: ...ises a number of menus for implementing changes and enabling or disabling features This chapter explains the basic navigation of the MIC 6314 setup screens The BIOS ROM has a built in Setup program th...

Страница 33: ...t message Figure 2 2 Main setup screen Table 2 1 BIOS Menu Main Item Options Description Help Text BIOS Vendor American Megatrends BIOS vendor N A Core Version X YYY Show the BIOS core version N A Com...

Страница 34: ...on by highlighting it using the Arrow keys All Platform setup options are described in this section The Platform setup screen is shown below The submenus are described in the following pages Figure 2...

Страница 35: ...0 57600 115200 Configure the serial port baud rate Select the serial port baud rate Data Bits 7 8 Configure the number of data bits in each transmitted or received serial character for both serial por...

Страница 36: ...stop signal can be sent to stop the data flow Once the buffers are empty a start signal can be sent to re start the flow Hardware flow control uses two wires to send start stop sig nals Terminal Type...

Страница 37: ...Key Pad on Putty Select the Function Key and KeyPad on Putty Redirection After BIOS POST Always Enable BootLoader The settings specify that if Boot Loader is selected then legacy console redirection i...

Страница 38: ...lable only for EFI applica tions EHCI Hand Off Enabled Disabled Enable or disable EHCI hand offs for operating systems without ECHI hand off support This is a workaround for operating systems without...

Страница 39: ...or disable BIOS support for security devices The OS will not show security devices The TCG EFI protocol and INT1A interface will not be available Enable or disable BIOS support for security devices Th...

Страница 40: ...BIOS support for Vanderpool Technology Enabling Vanderpool Technology will take effect after reboot Intel VT d Enabled Disabled Enable or disable Intel Virtual ization Technology for directed I O VT...

Страница 41: ...al processor to exe cute a higher frequency when enough power is available with out exceeding CPU defined limits Turbo mode allows a CPU logical proces sor to execute a higher frequency when enough po...

Страница 42: ...f Test Log Item Options Description Help Text Erase Log Yes on every reset No Decide if the log should be erased every time the blade reset Erase log options When Log is Full Clear Log Do not log anym...

Страница 43: ...10 System event log screen Table 2 9 System Event Log Item Options Description Help Text SEL Components Enabled Disabled Enable or disable all the features of system event logging during boot Change...

Страница 44: ...set tab from the MIC 6314 setup screen to enter the Hardware setup screen Users can configure the CPU northbridge southbridge Super IO and HW monitor parameters Figure 2 11 Hardware settings screen 2...

Страница 45: ...to the IOH function on the Northbridge setup page The MIC 6314 BIOS also allows users to configure the PCIe link speed Gen 1 2 or 3 and its functions x16 x8x8 x8x4x4 x4x4x8 or x4x4x4x4 on the IOH con...

Страница 46: ...nfiguration screen Table 2 10 PCI Express Port Configuration Item Options Description Help Text PEG0 PEG1 PEG2 Auto Gen1 Gen2 Gen3 Access PEG0 1 2 link and speed information Configure PEG0 1 2 B0 D1 F...

Страница 47: ...ttings Item Options Description Help Text PCI Latency Timer 32 PCI Bus Clocks 64 PCI Bus Clocks 96 PCI Bus Clocks 128 PCI Bus Clocks 160 PCI Bus Clocks 192 PCI Bus Clocks 224 PCI Bus Clocks 248 PCI Bu...

Страница 48: ...disable the PCI device from gen erating PERR SERR Generation Disabled Enabled Enable or disable the PCI device from generating SERR Enable or disable the PCI device from gen erating SERR Above 4G Deco...

Страница 49: ...MI APTIO BIOS Setup 2 2 3 3 Southbridge Users can configure all the parameters related to PCH function on the Southbridge setup page Figure 2 17 Southbridge configuration screen SATA Configuration Fig...

Страница 50: ...13 ACPI Settings Item Options Description Help Text Enable ACPI Auto Configuration Disabled Enabled Enable or disable BIOS ACPI auto configuration Enable or disable BIOS ACPI auto con figuration Enab...

Страница 51: ...2 3 4 NCT6106D Super IO Configuration Users can configure the serial port parameters related to the NCT6104D Super IO Figure 2 20 NCT6106D Super IO configuration screen Serial Port 1 2 3 4 Configurat...

Страница 52: ...e serial ports COM Enable or disable serial ports COM Auto Flow Control On Off Enable or disable the Auto Flow Control of RS485 mode Auto Flow Control Table 2 15 SATA Configuration Item Options Descri...

Страница 53: ...features BMC related items such as the OS Watchdog Timer To obtain details of the BMC self test log and system event log users can enable the function to record logs Alternatively users can erase logs...

Страница 54: ...ff Select the keyboard NumLock state Select the keyboard NumLock state Quiet Boot Disabled Enabled If enabled POST messages are not displayed on the console This may speed up booting If disabled POS m...

Страница 55: ...Priority submenu boot sources and xxx Boot Device submenus are always available even when no device is present in the corresponding boot device submenu Figure 2 25 Hard disk driver BBS priorities scr...

Страница 56: ...able or disable the addressing bus from receiving messages from the A20 line This item is useful when RT code is executed above 1MB When this is set as Upon Request GA20 can be disabled using BIOS ser...

Страница 57: ...ork Do not launch UEFI Legacy Controls the execution of UEFI and legacy PXE OpROM Controls the execution of UEFI and legacy PXE OpROM Storage Do not launch UEFI Legacy Controls the execution of UEFI a...

Страница 58: ...as specified below Modify critical platform parameters Disable password support Modify the administrator password Those options are presented in grey text and are non selectable and read only at the U...

Страница 59: ...Discard modified set tings exit setup and continue system boot up using the previous settings Exit system setup with out saving changes Save Changes and Reset N A Save modified settings into non volat...

Страница 60: ...settings for all setup options Save as User Defaults N A Save all changes as user defaults Save all changes as user defaults Restore User Defaults BIOS N A Restore the setup options to the settings de...

Страница 61: ...Chapter 3 3 BMC Firmware Operation This chapter describes the BMC firmware features...

Страница 62: ...ackplane connector Once plugged into a backplane and supplied with power the BMC discovers the slot connector s geographic address GA The GA is used to assign a unique IPMB address according to the sl...

Страница 63: ...l over LAN Setup All of the four backplane ports of MIC 6314 s Ethernet interfaces can be used for IPMI over LAN The RJ45 LAN connectors on the front panel cannot be used for IPMI over LAN because no...

Страница 64: ...hreshold Payload Power voltage 12V 8 HP_12_0 VOL Voltage Threshold 12V 0 on the VPX Connector 9 PAY_5_0 VOL Voltage Threshold Payload Power voltage 5V 10 HP_5_0 VOL Voltage Threshold 5V 0 on the VPX C...

Страница 65: ...monitored by the BMC and can be read via IPMI Table 3 2 Threshold Descriptions Threshold Description UNR Upper Non Recoverable UC Upper Critical UNC Upper Non Critical LNC Lower Non Critical LC Lower...

Страница 66: ...the BMC through the KCS interface 3 3 3 4 Version Change Sensor The Version Change sensor is supported according to the IPMI specification 3 3 3 5 VR HOT Sensor The BMC SDR is equipped with a discrete...

Страница 67: ...6 5 4 3 2 1 0 Description Therm Trip CPU 0 root localhost ipmitool sdr list BMC_WATCHDOG 0x00 ok FW_PROGRESS 0x00 ok VERSION_CHANGE 0x00 ok PROC_VR_HOT 0x00 ok THERM_TRIP 0x00 ok INTEGRITY 0x00 ok PAY...

Страница 68: ...component a logical component feature on the board for example FRU RTC or simply a board specific event Event data 3 7 3 identifies the action or a subcomponent For example if the com ponent in byte...

Страница 69: ...cessful This example integrity sensor event reports a successful BMC firmware update Table 3 8 Integrity Sensor Event Definitions Data Byte Bit Description Value Event Data 1 7 0 IPMI Header 0xA0 Even...

Страница 70: ...be displayed using the IPMItool sel get entry Table 3 9 Integrity Sensor Event Data Component Action Subcomponent Result Byte 1 Byte2 BMC FW Update Successful 0x01 0x00 Update Timeout 0x01 0x04 Update...

Страница 71: ...ost ipmitool sel get 0x684 SEL Record ID 0684 Record Type 02 Timestamp 07 15 2016 18 49 19 Generator ID 008e EvM Revision 04 Sensor Type OEM Sensor Number 06 Event Type Sensor specific Discrete Event...

Страница 72: ...port extended OEM IPMI command sets based on the IPMI defined OEM Group network function NetFn codes 2Eh 2Fh The first three data bytes of IPMI requests and responses under the OEM Group net work func...

Страница 73: ...ed in the following sections 3 5 3 LAN Controller Interface Selection The BMC firmware provides OEM IPMI commands to allow users to switch the one BMC connected NC SI interface between four I350 LAN c...

Страница 74: ...port always use it never change to channel 2 4 Channel 2 is the only allowed port always use it never change to channel 1 The NC SI LAN controller channel setting is stored permanently non volatile EE...

Страница 75: ...el RJ45 0x03 RTM 1 0x04 RTM 2 Table 3 13 COM2 UART MUX Settings Setting Connection 0x00 No interface connected open 0x01 Serial overLAN SOL default 0x02 Front panel RJ45 0x03 RTM 1 0x04 RTM 2 Setting...

Страница 76: ...e OEM command shown below where 1 indicates enable and 0 indicates disable Read the BMC UART baud rate setting Response Change the BMC UART baud rate setting Response ipmitool raw 0x2e 0x41 0x39 0x28...

Страница 77: ...ress and the physical logical module location The MIC 6314 board is equipped with a total of five MAC addresses Read MAC address OEM command Response 3 5 9 Load Default Configuration OEM Command Sever...

Страница 78: ...Shutdown Timeout OEM Command The BMC will begin a countdown after receiving a graceful shutdown request and force the payload power to turn off after timeout Users can access and configure the timeout...

Страница 79: ...yload OS starts to shut down the system once it detects the ACPI event When OS shutdown is com plete the payload will indicate the achieved sleep state to the BMC 3 7 2 Graceful Shutdown Timeout A gra...

Страница 80: ...elected BIOS is corrupt 3 9 Supported Watchdogs 3 9 1 Firmware Watchdog The Firmware Watchdog monitors BMC functionality If the BMC hangs or stops exe cution the watchdog will not be restarted The wat...

Страница 81: ...pressing the front panel reset button and holding for at least five seconds Software is used to execute a standard IPMI cold reset command 3 10 1 2 BMC Warm Reset The warm BMC reset is similar to the...

Страница 82: ...supports various configurations To avoid incorrect configurations users should always verify the actual LAN and UART configuration settings before working with SOL 1 Select the LAN interface to be use...

Страница 83: ...l lan print Set in Progress Set Complete Auth Type Support NONE MD5 PASSWORD Auth Type Enable Callback NONE MD5 PASSWORD User NONE MD5 PASSWORD Operator NONE MD5 PASSWORD Admin NONE MD5 PASSWORD OEM I...

Страница 84: ...BMC IP Address U User P Pass word sol SOL Command Command Line Syntax I lanplus Specifies RMCP as the desired protocol H IP Address IP address assigned to the BMC U User User account default administr...

Страница 85: ...MC IP Address U User P Password sol set SOL set parameters and values set in progress set complete set in progress commit write enabled true false force encryption true false force authentication true...

Страница 86: ...MIC 6314 User Manual 74...

Страница 87: ...Chapter 4 4 HPM 1 Update This chapter explains how to update the software firmware components...

Страница 88: ...ade firmware using various interfaces MIC 6314 supports following IPMI interfaces KCS local payload interface active payload and OS support required IPMB remote bridged via the chassis manager indepen...

Страница 89: ...o activate the bootloader root localhost ipmitool hpm upgrade mic6313_bootloader_standard_0x01_ 0x01_adv img PICMG HPM 1 Upgrade Agent 1 0 9 Validating firmware image integrity OK Performing preparati...

Страница 90: ...update activation This procedure needs around 60 seconds to finalize the update root localhost ipmitool hpm upgrade mic6313_standard_hpm_fw_01_01 img PICMG HPM 1 Upgrade Agent 1 0 9 Validating firmwa...

Страница 91: ...rade 4 4 2 1 HPM 1 Activate Command Schedule FPGA loading using the HPM 1 activate command shown below root localhost ipmitool hpm upgrade mic6313_fpga_standard_01_14 img PICMG HPM 1 Upgrade Agent 1 0...

Страница 92: ...firmware update activation The system should take approxi mately 200 seconds to finalize the update 4 5 BIOS Upgrade 4 5 1 Load New BIOS Image Input the IPMItool HPM 1 upgrade command and select the...

Страница 93: ...using the HPM 1 activate command shown below 4 5 2 2 Payload Cold Reset A payload cold reset is required to activate the new BIOS image The payload reset can be performed using either of the followin...

Страница 94: ...ew active version should be the version obtained from the upload file used root localhost ipmitool hpm check PICMG HPM 1 Upgrade Agent 1 0 9 Target Information Device Id 0x74 Device Revision 0x81 Prod...

Страница 95: ...Appendix A A Pin Assignments This appendix describes the pin assignments...

Страница 96: ...2V 2 12V 12V 12V NC 12V 12V 12V 3 5V 5V 5V NC 5V 5V 5V 4 IPMB0 B_CLK IPMB0 B_DAT GND 12V_AUX GND SYSRESET NVMRO 5 GAP GA4 GND 3 3V_AUX not used GND IPMB0 A_CLK IPMB0 A_DAT 6 GA3 GA2 GND NC GND GA1 GA0...

Страница 97: ...IE_P1_ TX5 GND PCIE_P1_R X5 PCIE_P1_RX 5 GND 7 GND PCIE_P1 _TX6 PCIE_P1_TX 6 GND PCIE_P1_RX 6 PCIE_P1_R X6 8 GND PCIE_P1_T X7 PCIE_P1_ TX7 GND PCIE_P1_R X7 PCIE_P1_RX 7 GND 9 GND PCIE_P2_ TX0 PCIE_P2_...

Страница 98: ...P1_RX 4 PCIE_P1_R X4 6 GND PCIE_P1_T X5 PCIE_P1_T X5 GND PCIE_P1_R X5 PCIE_P1_RX 5 GND 7 GPIO6 GND PCIE_P1 _TX6 PCIE_P1_TX 6 GND PCIE_P1_RX 6 PCIE_P1_R X6 8 GND PCIE_P1_T X7 PCIE_P1_T X7 GND PCIE_P1_R...

Страница 99: ...7 Jn4 19 GND Jn4 18 Jn4 20 N 6 GND Jn4 21 Jn4 23 GND Jn4 22 Jn4 24 GND N 7 GND Jn4 25 Jn4 27 GND Jn4 26 Jn4 28 N 8 GND Jn4 29 Jn4 31 GND Jn4 30 Jn4 32 GND N 9 GND Jn4 33 Jn4 35 GND Jn4 34 Jn4 36 N 10...

Страница 100: ...6 D15 Jn6 E15 GND 5 NC GND Jn6 A17 Jn6 B17 GND Jn6 D17 Jn6 E17 6 GND Jn6 A19 Jn6 B19 GND Jn6 D19 Jn6 E19 GND 7 NC GND Jn6 A1 Jn6 B1 GND Jn6 D1 Jn6 E1 8 GND Jn6 A3 Jn6 B3 GND Jn6 D3 Jn6 E3 GND 9 NC GND...

Страница 101: ...D GND 6 GND USB3_5_T X USB3_5_Tx GND USB3_5_R X USB3_5_R X GND 7 GREEN GND USB3_6_TX USB3_6_TX GND USB3_6_R X USB3_6_RX 8 GND SATA4_TX SATA4_Tx GND SATA4_RX SATA4_RX GND 9 BLUE GND SATA5_Tx SATA5_Tx G...

Страница 102: ...TA3_RX GND 5 VBAT GND COM3_DCD COM3_RI GND COM3_RX COM3_TX 6 GND COM3_RT S COM3_CTS GND COM3_DTR COM3_DSR GND 7 RIO_GPIO7 GND COM4_DCD COM4_RI GND COM4_RX COM4_TX 8 GND COM4_RT S COM4_CTS GND COM4_DTR...

Страница 103: ...3 VPWR 5V 4 GND GND NC JTCK GND GND NC MRSTO 5 PETX_P4 PETX_N4 3 3V PETX_P5 PETX_N5 VPWR 5V 6 GND GND NC JTMS GND GND 12V 7 PETX_P6 PETX_N6 3 3V PETX_P7 PETX_N7 VPWR 5V 8 GND GND NC JTDI GND GND 12V 9...

Страница 104: ...D 14 VSYNC 7 GND 15 DDC_CLK 8 GND Table A 11 CNCOM1 RJ45 Connector 1 DCD 6 DSR 2 SIN 7 RTS 3 SOUT 8 CTS 4 DTR 5 GND Table A 12 CN and CN5 USB Ports 1 and 2 1 5V fused 1 5V fused 2 USBD0 2 USBD1 3 USBD...

Страница 105: ...HB and IDE Hot Swap LEDs Name Description PWR Green Indicates power status BMC Yellow Indicates BMC status steady blinking indicates the BMC is active HDD Hot Swap Yellow Blue Indicates IDE activity...

Страница 106: ...MIC 6314 User Manual 94...

Страница 107: ...Appendix B B Programming the Watchdog Timer This appendix describes how to program the watchdog timer...

Страница 108: ...he watchdog timer by rewriting and set ting the value of I O port 443 443 hex To disable the watchdog timer the program should read I O port 444 hex The following example demonstrates how to program t...

Страница 109: ...Appendix C C I O Controller List...

Страница 110: ...Intel Lynx Point SATA to backplane Intel Lynx Point Cfast Intel Lynx Point USB 2 0 3 0 to front panel Intel Lynx Point USB 2 0 3 0 to backplane Intel Lynx Point Audio to backplane Intel Lynx Point Fro...

Страница 111: ...Appendix D D Glossary...

Страница 112: ...Peripheral Component Interconnect PCIe Peripheral Component Interconnect Express PHY Physical layer interface RIO Rear Input Output RS232 An interface specified by the Electronic Industries Alliance...

Страница 113: ...nual Appendix D Glossary RMCP Remote Management Control Protocol SDR Sensor Data Record SerDes Serializer Deserializer SOL Serial Over LAN SPI Serial Peripheral Interface UART Universal Asynchronous R...

Страница 114: ...MIC 6314 User Manual 102...

Страница 115: ...Appendix E E BIOS Checkpoint...

Страница 116: ...firmware model described in the Intel Platform Innovation Framework for EFI This framework refers the following boot phases which may apply to various status code and descriptions Security SEC initia...

Страница 117: ...C error codes 0x0E Microcode not found 0x0F Microcode not loaded Status Code Description Progress Codes 0x10 PEI core is started 0x11 Pre memory CPU initialization is started 0x12 Pre memory CPU initi...

Страница 118: ...ization Northbridge module spe cific 0x3B Post memory Southbridge initialization is started 0x3C Post memory Southbridge initialization Southbridge module spe cific 0x3D Post memory Southbridge initia...

Страница 119: ...s started 0x61 NVRAM initialization 0x62 Installation of the Southbridge runtime services 0x63 CPU DXE initialization is started 0x64 CPU DXE initialization CPU module specific 0x65 CPU DXE initializa...

Страница 120: ...itialization 0x9A USB initialization is started 0x9B USB reset 0x9C USB detect 0x9D USB enable 0x9E 0x9F Reserved for future AMI codes 0xA0 IDE initialization is started 0xA1 IDE reset 0xA2 IDE detect...

Страница 121: ...scription 0x01 System is entering S1 sleep state 0x02 System is entering S2 sleep state 0x03 System is entering S3 sleep state 0x04 System is entering S4 sleep state 0x05 System is entering S5 sleep s...

Страница 122: ...MIC 6314 User Manual 110...

Страница 123: ...Appendix F F IPMI PICMG Command Subset Supported by BMC...

Страница 124: ...Ref NetFn CMD IPMI BMC Req Advantech BMC Support Reset Watchdog Timer 27 5 App 22h Mandatory Yes Set Watchdog Timer 27 6 App 24h Mandatory Yes Get Watchdog Timer 27 7 App 25h Mandatory Yes Command IP...

Страница 125: ...r Name 22 28 App 45h Optional Yes Get User Name 22 29 App 46h Optional Yes Set User Password 22 30 App 47h Optional Yes Activate Payload 24 1 App 48h Yes Deactivate Payload 24 2 App 49h Yes Get Payloa...

Страница 126: ...Chassis 07h Optional No Set System Boot Options 28 12 Chassis 08h Optional Yes Get System Boot Options 28 13 Chassis 09h Optional Yes Get POH Counter 28 14 Chassis 0Fh Optional No Command IPMI v2 0 Re...

Страница 127: ...2Ah Optional Yes Get Sensor Event Status 35 13 S E 2Bh Optional Yes Get Sensor Reading 35 14 S E 2Dh Mandatory Yes Set Sensor Type 35 15 S E 2Eh Optional No Get Sensor Type 35 16 S E 2Fh Optional No C...

Страница 128: ...Entry 31 7 Storage 45h Mandatory No Delete SEL Entry 31 8 Storage 46h Optional No Clear SEL 31 9 Storage 47h Mandatory Yes Get SEL Time 31 10 Storage 48h Mandatory Yes Set SEL Time 31 11 Storage 49h...

Страница 129: ...6 1 Transport 20h Yes Set SOL Configuration Parameters 26 2 Transport 21h Yes Get SOL Configuration Parameters 26 3 Transport 22h Yes Command IPMI v2 0 Ref NetFn CMD IPMI BMC Req Advantech BMC Support...

Страница 130: ...v2 0 Ref NetFn CMD IPMI BMC Req Advantech BMC Support Bridge Request ICMB Bridge 20h Optional Mandatory No Bridge Message ICMB Bridge 21h Optional Mandatory No Command IPMI v2 0 Ref NetFn CMD IPMI BM...

Страница 131: ...t FRU LED State 3 32 PICMG 08h Yes Set IPMB State 3 70 PICMG 09h No Set FRU Activation Policy 3 20 PICMG 0Ah No Get FRU Activation Policy 3 21 PICMG 0Bh No Set FRU Activation 3 19 PICMG 0Ch No Get Dev...

Страница 132: ...Yes Get component properties 3 5 PICMG 2Fh Yes Abort Firmware Upgrade 3 15 PICMG 30h Yes Initiate upgrade action 3 8 PICMG 31h Yes Upload firmware block 3 9 PICMG 32h Yes Finish firmware upload 3 10...

Страница 133: ...Appendix G G Drivers and Tools...

Страница 134: ...standard userland interface or watchdog Supports generating an event on a panic Source OpenIPMI Page http openipmi sourceforge net Additional information regarding the IPMI driver can be found on the...

Страница 135: ...123 MIC 6314 User Manual Appendix G Drivers and Tools...

Страница 136: ...e subject to change without notice No part of this publication may be reproduced in any form or by any means such as electronically by photocopying recording or otherwise without prior written permiss...

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