VPX6600
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 23 -
http://www.acromag.com
- 23 -
https://www.acromag.com
The processor supports streaming any 3 independent and simultaneous
display combination of DisplayPort/HDMI/DVI. In the case of three
simultaneous displays, two High Definition Audio streams over the digital
display interfaces are supported.
3.6.1.1 DisplayPort
DisplayPort is a digital communication interface that uses differential signaling
to achieve a high-bandwidth bus interface designed to support connections
between PCs and monitors, projectors, and TV displays.
A DisplayPort consists of a Main Link, Auxiliary channel, and a Hot-Plug Detect
signal. The Main Link is a unidirectional, high-bandwidth, and low-latency
channel used for transport of isochronous data streams such as uncompressed
video and audio. The Auxiliary Channel (AUX CH) is a half-duplex bidirectional
channel used for link management and device control. The Hot-Plug Detect
(HPD) signal serves as an interrupt request for the sink device.
The Intel 6
th
Gen Skylake Core CPU is designed in accordance to VESA
DisplayPort Standard 1.2, VESA DisplayPort PHY Compliance Test Specification
1.2, and VESA DisplayPort Link Layer Compliance Test Specification 1.2.
3.6.1.2 HDMI
The High-Definition Multimedia Interface (HDMI) is provided for transmitting
uncompressed digital audio and video signals from DVD players, set-top boxes,
and other audio-visual sources to television sets, projectors, and other video
displays. It can carry high-quality multi-channel audio data and all standard
and high-definition consumer electronics video formats. The HDMI display
interface connecting the processor and display devices uses transition
minimized differential signaling (TMDS) to carry audio-visual information
through the same HDMI cable.
HDMI includes three separate communications channels: TMDS, DDC, and the
optional CEC (consumer electronics control). CEC is not supported on the
processor. The HDMI cable carries four differential pairs that make up the
TMDS data and clock channels. These channels are used to carry video, audio,
and auxiliary data. In addition, HDMI carries a VESA DDC. The DDC is used by
an HDMI Source to determine the capabilities and characteristics of the Sink.
Audio, video, and auxiliary (control/status) data is transmitted across the three
TMDS data channels. The video pixel clock is transmitted on the TMDS clock
channel and is used by the receiver for data recovery on the three data
channels. The digital display data signals driven natively through the PCH are
AC coupled and need level shifting to convert the AC coupled signals to the
HDMI compliant digital signals.
The Intel 6
th
Gen Skylake Core CPU is designed in accordance with the High-
Definition Multimedia Interface Specification Version 1.4.
