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3.5 Random Access Memory.
The Model A BBC Microcomputer is fitted with eight 16k by 1 bit random-access memory devices in IC
positions 53 to 60 providing a total of 16 kilobytes. A further 16 kilobytes of RAM is fitted to the Model B
machine in IC positions 61-68 inclusive, thus providing the full 32 kilobytes of RAM.
The RAM devices used are dynamic types. In dynamic RAMS each bit of information is stored as an
electrical charge on the gate capacitance of a field effect transistor. The charge on the gate capacitance
leaks away with time (typically 2ms) and must therefore be replenished or "refreshed" periodically, in
order to retain the data stored in the memory. This is accomplished by activating the Row Address Select
(RAS) signal whilst a valid row address is on the address lines. In this way, 256 bytes of RAM are
refreshed after each high to low transition of the RAS line.
The 6502A microprocessor, unlike the Z80, does not provide a facility for directly refreshing dynamic
RAM and therefore additional circuitry is required. In the BBC Microcomputer the RAS inputs of the
dynamic RAMs are continuously activated by the output of a D-type bistable (half of IC44). The 4 and
8MHz clock signals provide the input to this bistable.
The 6845 cathode ray tube controller (CRTC, IC2) or the microprocessor may have control of the RAM
address lines. Six octal three-state buffers (IC8 to IC13) are used to select which of these two devices
has access to the RAM address lines. The outputs of the dynamic RAMs are enabled when the Column
Address Select (CAS) lines are activated.
Control of the RAM address lines is alternately switched between the microprocessor and the CRTC
every 250ns. One of the primary functions of the 6845 CRTC is to generate RAM refresh addresses,
which it must do in order to refresh the screen. The RAM refresh addresses are generated sequentially
and since the CRTC has access to the RAM address lines twice in every microsecond, 512 bytes are
refreshed in this period. This method of RAM refreshing is often referred to as "transparent" RAM refresh
since it is performed whilst the microprocessor is engaged in internal activity and hence the operation is
transparent to it.
3.6 The Video Generating Circuitry.
The video circuitry of the BBC Microcomputer is designed around three integrated circuits. These are
i)
IC2 a 6845 cathode ray tube controller (CRTC).
ii)
IC6 a custom designed video processor (VULA).
iii)
IC5 an SAA5050 Teletext character generator.
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