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Theory of Operation

Configuration Register

The Configuration Register allows software control of several board
parameters associated with memory mapping. Figure 3-4 illustrates
the Configuration Register bits that affect these parameters. The fol-
lowing is a description of the purpose of each Configuration Register
bit:

Bit 0

Map Enable bit. Setting bit 0 to logical 1 turns on the
board’s mapping functions. Bit 0 must be set to logical 0
when changing the Map Registers.

Bit 1

Absolute Address Disable bit.

Use Bit 1 to choose

between an "absolute address mode" (see page 3-19) and
addressing modes using the mapping function. Set bit 1
to logical 0 to select absolute address mode.

Bit 2

Map Write Enable bit. Set bit 2 to logical 0 to protect the
Map Register data from being overwritten. Bit 2 must be
set to logical 1 to load the Map Registers.

Bit 3

RAM Write Enable bit.

Use bit 3 to control write

protection of RAM (see page 3-6) in software. Set bit 3
to logical 0 to protect RAM from being altered.

Bits 4 - 6

Undefined.

Bit 7

Alternate Map Register Enable bit. Set bit 7 to logical 1
to enable access to a complete alternate set of Map
Registers.

1

2

3

4

5

6

7

0

Alternate

Map
Register
Enable
bit

Map
Write
Enable
bit

Absolute
Address
Disable
bit

Map
Enable
bit

RAM
Write
Enable
bit

Figure 3–4. Configuration Register.

3-17

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Summary of Contents for ZT 8825

Page 1: ...service in house repair center WE BUY USED EQUIPMENT Sell your excess underutilized and idle used equipment We also offer credit for buy backs and trade ins www artisantg com WeBuyEquipment REMOTE IN...

Page 2: ...UAL For ZT 8825 and ZT 88CT25 REVISION A 4 Reorder Part Number ZT M8825 April 29 1993 1050 Southwood Drive San Luis Obispo CA 93401 USA FAX 805 541 5088 Telephone 805 541 0488 Artisan Technology Group...

Page 3: ...y product to Ziatech for repair Life Support Policy Ziatech products are not authorized for use as critical components in life support devices or systems without the express written approval of the pr...

Page 4: ...can also use a modem to leave a message on the 24 hour Ziatech Bulletin Board Service BBS by calling 805 541 8218 The BBS will provide you with current Ziatech product revision and upgrade informatio...

Page 5: ...ormation I INTRODUCTION Chapter 1 Introduction contains a brief overview of the ZT 8825 It includes a product definition and a listing of product features I GETTING STARTED Chapter 2 Getting Started s...

Page 6: ...ates the factory default configuration and includes a figure that shows the location of each jumper Appendix B Specifications includes electrical mechanical and environmental specifications for the ZT...

Page 7: ...UNPACKING 2 2 WHAT S IN THE BOX 2 2 SYSTEM REQUIREMENTS 2 3 Backplane Recommendations 2 4 Processor Compatibility 2 4 SOCKET ASSIGNMENTS 2 5 WRITE PROTECT 2 5 MEMORY SPEED REQUIREMENTS 2 6 BOARD CONF...

Page 8: ...18 Absolute Address Mode 3 19 EXTENDED MEMORY MODE 3 20 Setting the 24 bit Map Register 3 20 Chapter 4 APPLICATION EXAMPLES 4 1 OVERVIEW 4 1 INITIALIZING ZT 8825 AS CONTINUOUS MEMORY 4 1 Assembly Lan...

Page 9: ...B 4 Operating Temperature B 4 Storage Temperature B 4 MECHANICAL SPECIFICATIONS B 4 Card Dimensions Weight B 4 Appendix C HARDWARE QUICK REFERENCE C 1 JUMPER DESCRIPTIONS C 2 JUMPER REFERENCE TABLES C...

Page 10: ...Contents Appendix E GLOSSARY E 1 V INDEX Index i Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 11: ...Table 5 3 Chip Type Jumper Configurations 5 5 Table 5 4 Switch Settings for All Possible Chip Sizes 5 7 Table 5 5 ZT 8825 Basic Access Time Requirements 5 8 Table 5 6 Jumper Settings for Battery Backu...

Page 12: ...tation 2 11 Figure 3 1 Functional Block Diagram 3 2 Figure 3 2 Logical to Physical Address Mapping 3 15 Figure 3 3 Map Register 3 16 Figure 3 4 Configuration Register 3 17 Figure A 1 Customer Jumper C...

Page 13: ...This chapter briefly introduces some key features and some possible applications for the ZT 8825 Unless specifically called out all references to ZT 8825 also refer to the CMOS extended temperature ve...

Page 14: ...or the Motorola 680XX family the ZT 8825 provides memory that can be mapped in 16 Kbyte blocks at any address including those above the 1 Mbyte limit The board supports 24 bit addressing if the CPU me...

Page 15: ...ses The ZT 8825 configured with 120 ns memories operates without wait states when used with an 8 MHz processor board such as the ZT 8809 The ZT 8825 configured with 250 ns memories operates without wa...

Page 16: ...otect to aid debugging No wait states needed at 5 or 8 MHz with fast memory chips Supports EMS versions 3 2 and 4 0 as well as EEMS version 3 2 Supports 5V only Flash EPROMS 2 Mbyte maximum on board s...

Page 17: ...2 14 I O ADDRESSING 2 16 OVERVIEW This chapter is intended for users who require only a brief summary of information essential to getting their systems up and running Other users should refer back to...

Page 18: ...tion RMA Number see page D 6 WHAT S IN THE BOX When the package is opened you should find 1 The ZT 8825 Operator s Manual and the ZT 8825 Software Support Package manual in a binder 2 One ZT 8825 or Z...

Page 19: ...etween 0 and 65 Celsius to avoid improper operation and possible damage to the ZT 8825 The ZT 88CT25 operates in an ambient temperature range of 40 to 80 C The relative humidity should be less than 95...

Page 20: ...rd cages and backplanes work well in STD 80 and STD 32 systems Processor Compatibility The ZT 8825 is designed for STD 80 Series systems It can be used with other microprocessors only if they meet the...

Page 21: ...ebugging programs in RAM there is a tendency for certain programming errors to cause undesired writes to RAM The ZT 8825 has a write protect switch SW2 that can be used to prevent writes to any of the...

Page 22: ...Access Time Requirements 0 WAIT STATES 1 WAIT STATE TIMING ZT 8825 ZT 88CT25 ZT 8825 ZT 88CT25 5 MHz 8 MHz 5 MHz 8 MHz 5 MHz 8 MHz 5 MHz 8 MHz Tce 290 120 255 80 490 240 455 205 Taa 315 140 295 130 51...

Page 23: ...appears in Figure 2 2 on page 2 9 Each configurable option is covered in detail in Chapter 5 Configurable Options to assist you to correctly set your board for non default operation Appendix A Jumper...

Page 24: ...A 6A 7A 4B 5B 6B 7B W3 W4 W7 W8 W9 W10 W11 W12 W13 W14 W17 W21 W19 W20 W18 J1 J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 W1 W16 SW2 SW2 Down toward board Fi...

Page 25: ...6A 7A 4B 5B 6B 7B W3 W4 W7 W8 W9 W10 W11 W12 W13 W14 W17 W21 W19 W20 W18 J1 J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 W1 W16 SW2 SW2 Down toward board Fig...

Page 26: ...r allowable settings WARNING Memory chips must be properly oriented to avoid damage Pin 1 must be installed in the upper left hand corner of the socket as indicated in Figure 2 3 Note that some hybrid...

Page 27: ...Getting Started ZT 8825 REV A 4 4A 5A 6A 7A 4B 5B 6B 7B Pin 1 Figure 2 3 Memory Chip Orientation 2 11 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 28: ...witch section 321 or 654 16K 000 32K 001 64K 010 128K 011 256K 100 512K 101 1M 110 512K 111 special two chips in row A Switch section setting of 0 ON 1 OFF 2 12 Artisan Technology Group Quality Instru...

Page 29: ...11 512K 101 2 chips sockets 4 and 5 max e g use Row A for RAM and Row B for PROM 2 chips sockets 4 and 5 only due to 2 Mbyte board limit 1 2 3 or 4 chips per row are acceptable Notes Any empty sockets...

Page 30: ...e and type Jumper sets J1 and J2 define the configuration for memory chip Rows A and B respectively The configurations shown in Table 2 4 cover all chip types known at publication time 2 14 Artisan Te...

Page 31: ...e routines for programming See ZT 8825 Software Support Package documentation Chip Type J1 or J2 Pin 16 Kbyte EPROM 64 Kbyte EPROM 256 Kbyte EPROM 512 Kbyte EPROM 1 Mbyte EPROM 128 Kbyte SRAM 256 Kbyt...

Page 32: ...is 0EE68h Table 2 5 ZT 8825 I O Registers Base Default Description 000 EE68h Low order six bits of map register address write only 001 EE69h High order four bits of map register address write only 010...

Page 33: ...s Binary Hexadecimal A15 W14 out 1 A14 W13 out 1 A13 W12 out 1 E A12 W11 in 0 A11 1 hardwired 1 A10 1 hardwired 1 A9 1 hardwired 1 E A8 0 hardwired 0 A7 W10 in 0 A6 W9 out 1 A5 W8 out 1 6 A4 W7 in 0 A...

Page 34: ...III USER S REFERENCE THEORY OF OPERATION 3 1 APPLICATION EXAMPLES 4 1 CONFIGURABLE OPTIONS 5 1 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 35: ...EMORY ADDRESSING 3 13 20 bit Memory Addressing 3 13 24 bit Memory Addressing 3 13 MEMORY MAPPING 3 14 Paging 3 14 Map Registers 3 15 Configuration Register 3 17 Setting the Map Register 3 18 Absolute...

Page 36: ...n the board Refer to Figure 3 1 as you read this chapter S W 1 J2 PAL CHIP SELECT DECODER MEMORY CHIP SOCKET ROW A MEMORY CHIP SOCKET ROW B J1 PAL CHIP SELECT DECODER OPTIONAL BATTERY BACKUP DATA BUFF...

Page 37: ...ry chip type for example EPROM EEPROM static RAM The ZT 8825 uses the STD 80 Series 20 bit memory address protocol It can also accommodate 24 bit addressing The user sees the board as many separate 16...

Page 38: ...configuring the board for memory chip type MEMORY CHIP SIZE Switch 1 is a six segment switch that provides a signal to a pre programmed PAL indicating the chip size used in each row This allows the PA...

Page 39: ...111 2 chips sockets 4 and 5 max e g use Row A for RAM and Row B for PROM 2 chips sockets 4 and 5 only due to 2 Mbyte board limit 1 2 3 or 4 chips per row are acceptable Notes Any empty sockets must be...

Page 40: ...t requires WAITRQ to be asserted by mid T2 the CPU must insert the wait state The ZT 88CT25 wait state generator will not be fast enough at 8 MHz to meet the ZT 8817 requirement Access time requiremen...

Page 41: ...various SRAM chips installed Table 3 2 Est Battery Life Max Standby Current CHIPS CURRENT ESTIMATED BATTERY LIFE INSTALLED DEMAND HOURS Max A 0 C to 65 C Eight 200 A SRAMs 1640 610 Eight 50 A SRAMs 4...

Page 42: ...ch week has 24 hrs day x 7 days week 168 hrs week Since the battery is not in use 40 hrs week the weekly rate of battery use is 168 40 hrs week 128 hrs week which gives a daily rate of 128 hrs week 7...

Page 43: ...rd battery backup DCLOW is asserted when the 5 V supply is below 4 50 V The ZT 8825 uses this signal to disable any glitching on the write line or chip selects to the memory chips This signal may opti...

Page 44: ...25 during implementation of EMS See page 3 14 for more information about EMS and the ZT 8825 Software Support Package manual for EMS programming considerations Table 3 3 Default I O Address Assignment...

Page 45: ...l 1 A2 is not decoded A1 A0 define the four unique addresses 000b 001b 010b and 011b used on the ZT 8825 see Table 3 4 Note Since A2 is not decoded four addresses 100b 101b 110b and 111b are redundant...

Page 46: ...ault base address is 1110111001101XXXb or 0EE68h See page 5 10 for more information on configuring I O addresses The base address is decoded by two 8 bit comparators IOEXP Input Output Expansion signa...

Page 47: ...ress bits are zeros That is the 1 Mbyte address space is at the bottom of the 16 Mbyte Extended Memory address space 20 bit addressing allows for 64 Map Registers see page 3 15 for more information on...

Page 48: ...ess memory anywhere in the 16 Mbyte Extended Memory space is also supported Paging The memory resident on the ZT 8825 can be located outside the normal memory map of the PC when the ZT 8825 is used as...

Page 49: ...in 20 bit address systems 1 024 Map Registers are available in 24 bit address systems In addition a complete alternate set of Map Registers can be loaded at the same time as the primary set and switc...

Page 50: ...frame is free to associate with another page In this manner more than 1 Mbyte of physical memory can be mapped into the 1 Mbyte logical memory space Since 7 bits can point to 128 pages of 16 Kbytes ea...

Page 51: ...mapping function Set bit 1 to logical 0 to select absolute address mode Bit 2 Map Write Enable bit Set bit 2 to logical 0 to protect the Map Register data from being overwritten Bit 2 must be set to...

Page 52: ...5 Put the lower six bits of the Map Register index number into the Map Low Address Register Typically the lowest index number will be entered and will then be incremented by software for each success...

Page 53: ...limit of memory on the board This is useful for small systems where the ZT 8825 is the only RAM board or in systems where it is used for RAM disks and for lower memory Only one ZT 8825 in a system can...

Page 54: ...t 7 to a logical 0 to load the primary Map Register set b logical 1 to load the Alternate Map Register set 4 Set the Map High Register to 0000 5 Set the Map Low Register to 000000 6 Allow software to...

Page 55: ...it 7 to a logical 0 to access the Primary Map Register set b logical 1 to access the Alternate Map Register set 11 Enable the board by setting Configuration Register bit 0 to logical 1 3 21 Artisan Te...

Page 56: ...EMS 4 7 Example 1 4 7 Example 2 4 12 Example 3 4 21 Example 4 4 23 OVERVIEW This chapter includes specific examples of the ZT 8825 in operation INITIALIZING ZT 8825 AS CONTINUOUS MEMORY The examples i...

Page 57: ...EQU 0EH EN_BOARD EQU 0BH MOV DX CONFIG MOV AL EN_MAP_WR OUT DX AL ENABLE WRITES TO MAP REGISTER MOV DX HI_ADDR MOV AL 0 OUT DX AL SELECT LOWER 64 MAP REGISTERS MOV AL 0 START AT REGISTER 0 MOV CX 64 C...

Page 58: ...ples INC AH INCREMENT PAGE NUMBER LOOP INIT_LOOP SELECT NEXT PAGE MOV DX CONFIG MOV AL EN_BOARD OUT DX AL TURN ON BOARD 4 3 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE ww...

Page 59: ...fine DEFAULT_PAGES 16 define REG_LO_ADDR 0 define REG_HI_ADDR 1 define REG_DATA 2 define REG_CONFIG 3 define CONFIG_ENABLE_MAPPING 0x01 define CONFIG_NO_ABS_ADDR 0x02 define CONFIG_MAP_WRITE_ENABLE 0x...

Page 60: ...r baseaddr pages unsigned int ioaddr baseaddr pages int basemap i basemap baseaddr 10 outp ioaddr REG_CONFIG CONFIG_MAP_WRITE_ENABLE outp ioaddr REG_HI_ADDR 0 for i 0 i pages i outp ioaddr REG_LO_ADDR...

Page 61: ...Input 0 baseaddr DEFAULT_BASE_SEG else sscanf Input x baseaddr printf Number of pages to initialize in decimal d DEFAULT_PAGES gets Input if strlen Input 0 pages DEFAULT_PAGES else sscanf Input d pag...

Page 62: ...0x67 EMM interrupt number define GET_PAGE_FRAME 0x41 EMM get page frame function number define GET_UNALLOC_PAGE_COUNT 0x42 EMM get unallocated page count function number define ALLOCATE_PAGES 0x43 EM...

Page 63: ...vice name should be int_67_device_name_ptr build_ptr segment_regs es 0xA Compare memory with EMM device name if memcmp EMM_device_name int_67_device_name_ptr DEVICE_NAME_LENGTH 0 return TRUE else retu...

Page 64: ...es emm_handle physical_page logical_page unsigned int emm_handle int physical_page int logical_page input_regs h ah MAP_PAGES input_regs h al physical_page input_regs x bx logical_page input_regs x dx...

Page 65: ...ages_needed int physical_page int logical_page int index Determine if EMM is installed if emm_installed exit 1 Determine if enough expanded memory pages exist for application pages_needed 1 if enough_...

Page 66: ...pf_addr exit 1 Write to expanded memory for index 0 index 0x3fff index pf_addr index index Return expanded memory pages before exiting if deallocate_expanded_memory_pages emm_handle exit 1 4 11 Artisa...

Page 67: ...l memory page frames 7 Displays the base address of this EMM memory page frame 8 Performs a simple read write test on the EMM memory 9 Returns the EMM memory back to the EMM 10 Exits All the calls are...

Page 68: ...ction Hex_String converts an integer into a four character hexadecimal number string with leading zeros Function Hex_String Number Integer ST5 Function Hex_Char Number Integer Char Begin If Number 10...

Page 69: ...egment address pointed to by interrupt 67h Create an eight character string from the eight successive bytes at address ES 000A 10 bytes from ES For Position 0 to 7 do Int_67_Device_Name Int_67_Device_...

Page 70: ...ages_Needed Integer Var Handle Integer Integer Var Regs Registers Begin with Regs do Begin Allocate the specified number of pages from EMM Load pseudo registers prior to invoking EMM AH allocate pages...

Page 71: ...address of the EMM page frame we are using The address returned is the segment of the page frame Function Get_Page_Frame_Base_Address Var Page_Frame_Address Integer Integer Var Regs Registers Begin w...

Page 72: ...tatus Deallocate_Expanded_Memory_Pages AH end with Regs do end Function Deallocate_Expanded_Memory_Pages This function returns the version number of the EMM as a three character string Function Get_Ve...

Page 73: ...umber Integer Begin Writeln Error_Message Writeln Error_Number Hex_String Error_Number Writeln EMM test program aborting Halt 1 end Procedure Error_Message This program is an example of the basic EMM...

Page 74: ...MM pages There are not that many available Error_Code end Pages_Needed Available_EMM_Pages Allocate expanded memory pages for our use Error_Code Allocate_Expanded_Memory_Pages Pages_Needed Emm_Handle...

Page 75: ...teln Testing EMM memory Offset 1 Verify True while Offset 16382 and Verify True do Begin If Mem Page_Frame_Base_Address Offset Offsey mod 256 then Verify False Offset Succ Offset end while Offset 1638...

Page 76: ...unter for string op CLD set up direction flag for forward REPE CMPSB Compare the strings JNE exit IF strings are not equal THEN exit ELSE check_enough_unallocated_pages MOV AH 41h AH EMM get unallocat...

Page 77: ...nt to physical page 0 MOV DI 0 DI used as index into physical page 0 MOV AL 0 Initialize AL for string STOSB operation MOV CX 4000h Initialize loop counter to length of expanded memory page size CLD S...

Page 78: ...init_seg_page 4000h MOV SI src_init_offset 0 Move data into expanded memory logical page 0 offset 0 MOV SI dest_init_seg_page 0 MOV SI dest_init_offset 0 Initialize for future compatibility MOV SI src...

Page 79: ...PE SELECTION 5 3 MEMORY CHIP SIZE SELECTION 5 6 WAIT STATE SELECTION 5 8 BATTERY BACKUP SELECTION 5 9 I O BASE ADDRESS SELECTION 5 10 MEMORY ADDRESS SELECTION 20 VS 24 BIT 5 12 5 1 Artisan Technology...

Page 80: ...ration These jumpers can be divided into the following groups Memory chip type selection Memory chip size selection Number of wait states Battery backup I O port base address Memory addressing The fol...

Page 81: ...s sockets 28 pin devices are loaded with socket pins 1 2 30 and 31 empty Table 5 1 Signal Choices on Each Socket Pin Signal 1 Signal 2 Signal 3 Wire Wrap 1 A18 A19 Vcc 3 A14 A15 Vcc 29 A14 WE 30 A17 V...

Page 82: ...3 Connects A14 to SRAM pin 3 13 to 14 Connects A14 to EPROM pin 29 14 to 15 Connects WE to SRAM pin 29 All pin numbers refer to 32 pin sockets Note EEPROMS and Flash EPROMs must be 5 V only and must h...

Page 83: ...ware routines for programming See ZT 8825 Software Support Package documentation Chip Type J1 or J2 Pin 16 Kbyte EPROM 64 Kbyte EPROM 256 Kbyte EPROM 512 Kbyte EPROM 1 Mbyte EPROM 128 Kbyte SRAM 256 K...

Page 84: ...mmed PALs are used on the ZT 8825 to decode the appropriate address bits based on the chip sizes used The chip sizes are set on six segment DIP switch 1 SW1 which provides the inputs to the PALs Switc...

Page 85: ...use Row A for RAM and Row B for PROM 2 chips sockets 4 and 5 only due to 2 Mbyte board limit 1 2 3 or 4 chips per row are acceptable Notes Any empty sockets must be accounted for by the software when...

Page 86: ...W16 selects one wait state for the board This allows slower chips with longer access times to be used You must select one wait state for the board if any chip on the board is slower than the times gi...

Page 87: ...OS RAMs such as the Hitachi 62256LP 12SL A special Schottky diode with very low reverse leakage current CR1 and a 100 ohm current limiting resistor are used to prevent charging the lithium battery Tab...

Page 88: ...it base address You must choose a base address that does not conflict with any other I O board that exists on the STD bus Any overlap causes conflict on the data bus it can produce invalid data and ca...

Page 89: ...to set address bits 15 12 and Jumpers W10 7 are used to set address bits 7 4 If the jumper is OUT the corresponding address bit must be a logical 1 in the base address to access the board Similarly i...

Page 90: ...bits 0 to 3 at the beginning of each cycle when MCSYNC is asserted This does not add any additional time overhead to the typical 8088 cycle The MEMEX signal is not used on this board For 24 bit memory...

Page 91: ...NDICES JUMPER CONFIGURATIONS A 1 SPECIFICATIONS B 1 HARDWARE QUICK REFERENCE C 1 CUSTOMER SUPPORT D 1 GLOSSARY E 1 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisan...

Page 92: ...s and are illustrated in full in Figure A 1 on page A 6 Table A 1 lists each jumper in numerical order and provides a functional description for each A dagger appearing in Table A 1 indicates a jumper...

Page 93: ...e 3 13 W6 Enables 16 bit I O port addressing for the on board registers see page 3 10 W7 8 9 10 Set the value of I O port address bits A4 A7 see page 3 11 W11 12 13 14 Set the value of I O port addres...

Page 94: ...ry backup mode for Row B chips see page 3 7 W19 Selects non battery backup mode for Row B chips see page 3 7 W20 Selects battery backup mode for Row A chips see page 3 7 May not be used on a ZT 88CT25...

Page 95: ...ery backup mode for Row A chips see page 3 7 W22 Enables board to drive DCLOW when Vcc 4 5 V see page 3 7 W23 Enables board to drive PBRESET when Vcc 4 5 V see page 3 7 Installed for factory default c...

Page 96: ...4321 B A On Board 000000 16K 16K 128K 001001 32K 32K 256K 001010 32K 64K 384K 010010 64K 64K 512K 001011 32K 128K 640K 011011 128K 128K 1M 011100 128K 256K 1 5M 100100 256K 256K 2M xxx101 512K 2M xxx1...

Page 97: ...W4 W7 W8 W9 W10 W11 W12 W13 W14 W17 W21 W19 W20 W18 J1 J2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 W1 W16 SW2 Figure A 1 Customer Jumper Configuration A 6 Ar...

Page 98: ...ght B 4 ELECTRICAL SPECIFICATIONS ZT 8825 Power Requirements 5 VDC 5 50 A typ 0 67 A max not including memory chips ZT 96008 memory kit 5 V 10 0 05 A max including four 32K x 8 RAM chips ZT 96009 memo...

Page 99: ...bus cards In STD bus systems one unit load is equal to one LSTTL load as follows Max high level input current 20 A Max low level input current 400 A The STD bus unit load reflects input current requir...

Page 100: ...5 37 8 10 12 14 7 9 11 13 60 60 60 60 2 2 2 2 STATUS 0 N C BUSRQ N C INTRQ N C NMIRQ N C PBRESET INTRQ2 PCI AUX GND N C AUX V N C 5 VOLTS GROUND N C D3 A19 3 S D2 A18 3 S D1 A17 3 S D0 A16 3 S A7 A6 A...

Page 101: ...n condensing relative humidity 40 C Storage Temperature 55 through 125 Celsius 95 non condensing relative humidity 40 C except the battery which must be kept at 110 C MECHANICAL SPECIFICATIONS Card Di...

Page 102: ...45 BEVEL BOTH EDGES 0 015 X 45 CHAMFER 2 PL 0 445 TOLERANCES 0 XXX 0 005 INCHES 0 100 FROM EDGE NO COMPONENT PLACEMENT 2 PL o o o 0 062 0 007 0 250 0 005 0 015 0 250 0 025 Figure B 1 ZT 8825 Card Dime...

Page 103: ...PCI 74ACT273 1 hex 3 state buffer ICPCI 74ACT367 1 octal comparator without pullups ICPCI 74ACT521 2 octal 3 state buffer ICPCI 74ACT541 2 octal 3 state latch ICPCI 74ACT573 4 D flip flop with preset...

Page 104: ...ile SWD 00007 1 switch toggle SPDT tiny PC mount SWD 00008 1 PNP 250 mW B 100 min TRN 2N3906 1 NPN B 100 150 mA TRN PN2222 4 Parts Differences Between ZT 8825 and ZT 88CT25 LOCATION ZT 8825 PART ZT 88...

Page 105: ...Appendix C HARDWARE QUICK REFERENCE Contents Page JUMPER DESCRIPTIONS C 2 JUMPER REFERENCE TABLES C 5 C 1 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 106: ...ge 3 13 W6 Enables 16 bit I O port addressing for the on board registers see page 3 10 W7 8 9 10 Set the value of I O port address bits A4 A7 see page 3 11 W11 12 13 14 Set the value of I O port addre...

Page 107: ...tery backup mode for Row B chips see page 3 7 W19 Selects non battery backup mode for Row B chips see page 3 7 W20 Selects battery backup mode for Row A chips see page 3 7 May not be used on a ZT 88CT...

Page 108: ...ttery backup mode for Row A chips see page 3 7 W22 Enables board to drive DCLOW when Vcc 4 5 V see page 3 7 W23 Enables board to drive PBRESET when Vcc 4 5 V see page 3 7 Installed for factory default...

Page 109: ...Decoding I O Address bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 W14 W13 W12 W11 1 1 1 0 W10 W9 W8 W7 1 Register Number The default I O base address on the ZT 8825 is 0EE68h 1110 1110 0110 1XXX C 5 Art...

Page 110: ...ftware routines for programming See ZT 8825 Software Support Package documentation Chip Type J1 or J2 Pin 16 Kbyte EPROM 64 Kbyte EPROM 256 Kbyte EPROM 512 Kbyte EPROM 1 Mbyte EPROM 128 Kbyte SRAM 256...

Page 111: ...xxx110 1M 2M 100111 256K 512K 2M 101111 512K 512K 2M 2 chips sockets 4 and 5 max e g use Row A for RAM and Row B for PROM 2 chips sockets 4 and 5 only due to 2 Mbyte board limit 1 2 3 or 4 chips per...

Page 112: ...RVICE D 6 ZT 8825 REVISION HISTORY Revision 0 1 Original release of the ZT 8825 Revision A June 7 1988 The ZT 8825 Revision A was created in order to implement the CMOS version ZT 88CT25 and to remove...

Page 113: ...ZT 8825 The A0 7 address receiver was modified to not latch A0 7 with MCSYNC This modification was implemented to make the ZT 8825 compatible with future Ziatech products Revision A 3 January 30 1991...

Page 114: ...new spec is 5 VDC 5 065 A max ZT 88CT08 Processor HALT not including memory chips 3 The battery cage jacks no longer extend beyond the STD specification 040 on the solder side of the board However whe...

Page 115: ...which reliability is achieved are 1 The product is designed in top down fashion utilizing the latest in hardware and software design techniques so that unwanted side effects and unclean interactions...

Page 116: ...d level products see the Technical Data Book or page 3 7 of this manual Notice Contact Ziatech for a Return Materials Authorization RMA number before returning any product to Ziatech for repair Life S...

Page 117: ...name of a technically qualified individual at your company who is familiar with the mode of failure on the board If the unit is out of warranty service is available at a predesignated service charge...

Page 118: ...munity DCLOW STD 80 power bus signal that indicates DC power has dropped below 4 5 V Used on the ZT 8825 to protect memory data during power failure EEMS Enhanced Expanded Memory Specification EMS Exp...

Page 119: ...ssed through 24 bit memory addressing Flash EPROM Electrically Erasable Programmable Read Only Memory that allows pages of its memory to be erased one at a time Memory can be erased without removing t...

Page 120: ...e Frame A 16 Kbyte block of logical memory space that points to a 16 Kbyte page of physical memory space in expanded memory PAL Programmable Array Logic Uses a fixed OR array fed by the output of a pr...

Page 121: ...des high speed low noise and compatibility with standard TTL SRAM See Static RAM Static RAM Random Access Memory stored in flip flops This construction allows for RAM that does not need to be refreshe...

Page 122: ...ressing 3 10 5 10 address mapping 3 14 3 15 alternate map register 3 15 3 17 3 18 3 20 ambient temperature requirements 2 3 B backplane recommendations 2 4 base I O address 2 16 3 10 5 10 batteries D...

Page 123: ...ion 2 7 2 8 default I O address assignments 2 17 3 10 dimensions and weight of ZT 8825 B 4 E EEMS 1 2 1 3 3 3 3 14 E 1 EEPROM 1 3 2 6 3 3 3 4 5 4 5 10 E 1 electrical specifications B 1 EMM version num...

Page 124: ...16 I O base address 2 16 3 10 5 10 IOEXP 3 12 5 10 A 3 C 3 E 2 I O port addressing 16 bit A 3 C 3 I O registers 3 11 J jumper configuration 5 9 jumper descriptions A 2 C 2 jumper settings default 2 7...

Page 125: ...12 memory chip size 3 4 5 6 memory chips 28 pin 2 5 memory chip type 3 4 5 3 memory mapping 3 14 memory speed requirements 2 6 5 8 microprocessor compatibility 2 4 Microsoft C program example 4 7 Micr...

Page 126: ...1 2 R RAM 1 3 3 17 3 18 3 21 5 9 RAM disk 1 2 3 19 E 4 registers configuration 3 17 3 18 3 19 3 20 I O 2 16 3 11 map 3 13 3 15 3 18 3 20 reliability of the ZT 8825 D 4 requirements system 2 3 Return M...

Page 127: ...technical assistance D 4 time requirements 2 6 5 8 TTL E 4 Turbo Pascal program example 4 12 U unpacking 2 2 V valid chip size combinations 2 13 3 5 Vss 5 9 W wait state 1 3 3 6 5 8 A 3 C 3 warranty D...

Page 128: ...Index Z ZT 88CT25 1 3 2 1 2 6 3 6 5 8 D 1 ZT 8825 revisions D 1 vii Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 129: ...service in house repair center WE BUY USED EQUIPMENT Sell your excess underutilized and idle used equipment We also offer credit for buy backs and trade ins www artisantg com WeBuyEquipment REMOTE IN...

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