Specifications
Table B-1
ZT 8825 STD Bus Loading.
PIN (COMPONENT SIDE)
OUTPUT DRIVE (LSTTL)
INPUT LOAD (CMOS)†
MNEMONIC
PIN (CIRCUIT SIDE)
OUTPUT DRIVE (LSTTL)
INPUT LOAD (CMOS)†
MNEMONIC
+5 VOLTS
GROUND
DC LOW*
D7 3-S (A23)
D6 3-S (A22)
D5 3-S (A21)
D4 3-S (A20)
A15
A14
A13
A12
A11
A10
A9
A8
RD*
MEMRQ*
MEMEX N.C.
MCSYNC*
2
4
6
16
18
20
22
24
26
28
30
32
34
36
38
1
3
5
15
17
19
21
23
25
27
29
31
33
35
37
8
10
12
14
7
9
11
13
60
60
60
60
2
2
2
2
STATUS 0* N.C.
BUSRQ* N.C.
INTRQ* N.C.
NMIRQ* N.C.
PBRESET*
INTRQ2*
PCI
AUX GND N.C.
AUX-V N.C.
+5 VOLTS
GROUND
N.C.
D3 (A19) 3-S
D2 (A18) 3-S
D1 (A17) 3-S
D0 (A16) 3-S
A7
A6
A5
A4
A3
A2
A1
A0
WR*
IORQ*
IOEXP
INTRQ1*
STATUS 1* N.C.
BUSAK* N.C.
INTAK*
WAITRQ*
SYSRESET* N.C.
CLOCK*
PCO
AUX GND N.C.
AUX+V N.C.
40
42
44
46
48
50
52
54
56
39
41
43
45
47
49
51
53
55
1
60
7
7
7
7
60
60
60
60
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
2
1
1
60
1
2
† CMOS input loads ±10µA maximum
B-3
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