Zynq Ult VCU TRD User Guide
50
UG1250 (v2019.1) May 29, 2019
Chapter 4
System Considerations
This chapter describes the boot process and address mapping.
Boot Process
The reference design uses a non-secure boot flow and SD boot mode. The sequence
diagram in
shows the exact steps and order in which the individual boot
components are loaded and executed.
The platform management unit (PMU) is responsible for handling primary pre-boot tasks
and is the first unit to wake up after power-on reset (POR). After the initial boot process, the
PMU continues to run and is responsible for handling various clocks and resets of the
system as well as system power management. In the pre-configuration stage, the PMU
executes the PMU ROM and releases the reset of the configuration security unit (CSU). It
then enters the PMU server mode where it monitors power.
The CSU handles the configuration stages and executes the boot ROM as soon as it comes
out of reset. The boot ROM determines the boot mode by reading the boot mode register,
it initializes the on-chip memory (OCM), and reads the boot header. The CSU loads the PMU
firmware into the PMU RAM and signals to the PMU to execute the firmware, which
X-Ref Target - Figure 4-1
Figure 4-1:
Boot Flow Sequence
Release
CSU
Power Management
Load PMU
FW
Load FSBL
Tamper Monitoring
PMU
CSU
APU
FSBL
ATF
U-boot
Linux Kernel
vcu_qt
(Linux App)
PL Bitstream
Rootfs
PL
Time
X19446-112718
