EBC-C413/Power-on Self-Test (POST) Codes
v1.2
www.winsystems.com
Page 78
SEC Phase
The SEC phase 8-Bit POST code values are shown in the table below.
NOTE The shaded rows in the table indicate the related functions are not from
InsydeH2O (platform dependent).
PEI Phase
The PEI phase 8-Bit POST code values are shown in the table below.
NOTE The shaded rows in the table indicate the related functions are not from
InsydeH2O (platform dependent).
OEM Reserved
0xE8 - 0xEB
Reserved
0xD8 - 0xE0
0xE5 - 0xE7
0xEC - 0xF8
Phase
POST Code Value Ranges
Value
Functionality Name
Description
01
SEC_SYSTEM_POWER_ON
CPU power on and switch to Protected mode
02
SEC_BEFORE_MICROCODE_PATCH
Patching CPU microcode
03
SEC_AFTER_MICROCODE_PATCH
Setup Cache as RAM
04
SEC_ACCESS_CSR
PCIE MMIO Base Address initial
05
SEC_GENERIC_MSRINIT
CPU Generic MSR initialization
06
SEC_CPU_SPEEDCFG
Setup CPU speed
07
SEC_SETUP_CAR_OK
Cache as RAM test
08
SEC_FORCE_MAX_RATIO
Tune CPU frequency ratio to maximum level
09
SEC_GO_TO_SECSTARTUP
Setup BIOS ROM cache
0A
SEC_GO_TO_PEICORE
Enter Boot Firmware Volume
Value
Functionality Name
Description
70
PEI_SIO_INIT
Super I/O initialization
71
PEI_CPU_REG_INIT
CPU Early Initialization
72
PEI_CPU_AP_INIT
Multi-processor Early initialization
73
PEI_CPU_HT_RESET
HyperTransport initialization
74
PEI_PCIE_MMIO_INIT
PCIE MMIO BAR Initialization
75
PEI_NB_REG_INIT
North Bridge Early Initialization
76
PEI_SB_REG_INIT
South Bridge Early Initialization
77
PEI_PCIE_TRAINING
PCIE Training
78
PEI_TPM_INIT
TPM Initialization
79
PEI_SMBUS_INIT
SMBUS Early Initialization
7A
PEI_PROGRAM_CLOCK_GEN
Clock Generator Initialization
7B
PEI_IGD_EARLY_INITIAL
Internal Graphic device early initialization
7C
PEI_HECI_INIT
HECI Initialization