The counter is controlled by the internal gate (i gate). The i gate is the
result of logic operation of hardware gate (HW gate) and software
gate (SW gate), where the HW gate evaluation may be deactivated
by the parameterization.
HW gate: open (activate):
Edge 0-1 at hardware gate
x
input
of the module
close (deactivate):
Edge 1-0 at hardware gate
x
input
of the module
SW gate: open (activate):
In application program by setting
SW_GATE of the SFB 47
close (deactivate):
In application program by reset-
ting SW_GATE of the SFB 47
The counter values may be read by the output parameter
COUNTVAL of the SFB 47. There is also the possibility for direct
access to the counter values by means of the input address of the
Count
submodule.
There are the following possibilities for connection to the technolog-
ical functions:
n
24V incremental encoder, equipped with two tracks with 90°
phase offset
n
24V pulse generator with direction signal
n
24V proximity switch (e.g. BERO or light barrier)
For not all inputs are available at the same time, you may set the
input assignment for every counter via the parameterization. For each
counter the following inputs are available:
n
Channel
x
(A)
Pulse input for count signal res. track A of an encoder. Here you
may connect encoder with 1-, 2- or 4-tier evaluation.
n
Channel
x
(B)
Direction signal res. track B of the encoder. Via the parameteriza-
tion you may invert the direction signal.
n
Hardware gate
x
This input allows you to open the HW gate with a high peek and
thus start a count process. The usage of the HW gate may be par-
ameterized.
n
Latch
x
With an edge 0-1 at Latch
x
the recent counter value is stored in a
memory that you may read at need.
Every counter has an assigned output channel. The following
behavior for the output channel may be set via parameterization:
n
No comparison: Output is not controlled and is switched in the
same way as a normal output.
n
Count value
³
comparison value: Output is set as long as counter
value
³
comparison value.
Controlling the counter
Read counter
Counter inputs (Con-
nections)
Counter outputs
VIPA System 300S
Deployment I/O periphery
Counter > Counter - Fast introduction
HB140 | CPU-SC | 312-5BE13 | GB | 15-50
100
