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Assembly and installation guidelines

3.1 Installation dimensions

2tier width (WxHxD) in mm: 80 x 125 x 120

Dimensions Basic

enclosure

Dimensions

Installation dimensions

VIPA System 300S

Assembly and installation guidelines

Installation dimensions

HB140 | CPU-SC | 312-5BE13 | GB | 15-50

Summary of Contents for CPU 312SC

Page 1: ...CPU SC 312 5BE13 Manual HB140 CPU SC 312 5BE13 GB 15 50 VIPA System 300S SPEED7 CPU 312SC...

Page 2: ...312 5BE13_000_CPU SC 312SC 1 GB 2015 VIPA GmbH Ohmstr 4 91074 Herzogenaurach Telephone 49 9132 744 0 Fax 49 9132 744 1864 Email info vipa com Internet www vipa com...

Page 3: ...4 Memory management 31 4 2 5 Storage media slot 31 4 2 6 Battery backup for clock and RAM 32 4 2 7 Operating mode switch 32 4 2 8 LEDs 33 4 3 Technical data 34 5 Deployment CPU 312 5BE13 46 5 1 Assemb...

Page 4: ...s 108 6 5 4 Counter Additional functions 113 6 6 Frequency measurement 120 6 6 1 Overview 120 6 6 2 Inputs for the frequency measurement 121 6 6 3 Parameterization 122 6 6 4 SFB 48 FREQUENC Frequency...

Page 5: ...n 175 9 Configuration with TIA Portal 177 9 1 TIA Portal Work environment 177 9 1 1 General 177 9 1 2 Work environment of the TIA Portal 177 9 2 TIA Portal Hardware configuration CPU 178 9 3 TIA Porta...

Page 6: ...very effort has been made to ensure that the information contained in this document was complete and accurate at the time of publishing Nevertheless the authors retain the right to modify the informat...

Page 7: ...ra e 4 91074 Herzogenaurach Germany Telefax 49 9132 744 1204 EMail documentation vipa de Contact your local VIPA Customer Service Organization representa tive if you encounter problems with the produc...

Page 8: ...ormation and useful tips 1 3 Safety information The system is constructed and produced for n communication and process control n industrial applications n operation within the environmental conditions...

Page 9: ...ied out when the system has been disconnected from power Installation and hardware modifications only by prop erly trained personnel The national rules and regulations of the respective country must b...

Page 10: ...ention to the applicable rules and regulations for handling the respective equipment can prevent failures of electrostatic sensitive modules Modules must be shipped in the original packing material Wh...

Page 11: ...ng has the lowest priority 2 2 2 Applications The program that is present in every CPU is divided as follows n System routine n User application The system routine organizes all those functions and pr...

Page 12: ...rm of bytes words or double words You may always access the current data block by means of operands You may access the following types of data n individual Bits n Bytes n Words n Double words 2 3 CPU...

Page 13: ...PU You may also access the CPU with a visualization software via these connections n Wiring by means of spring pressure connections CageClamps at the front connector n Core cross section 0 08 2 5mm2 n...

Page 14: ...es against short circuit Environmental conditions to EN 61131 2 Climatic Storage transport EN 60068 2 14 25 70 C Operation Horizontal installation hanging EN 61131 2 0 60 C Horizontal installation lyi...

Page 15: ...z 1000MHz 10V m 80 AM 1kHz 1 4GHz 2 0GHz 3V m 80 AM 1kHz 2GHz 2 7GHz 1V m 80 AM 1kHz EN 61000 4 6 HF conducted 150kHz 80MHz 10V 80 AM 1kHz EN 61000 4 4 Burst degree of severity 3 EN 61000 4 5 Surge in...

Page 16: ...1 Installation dimensions 2tier width WxHxD in mm 80 x 125 x 120 Dimensions Basic enclosure Dimensions Installation dimensions VIPA System 300S Assembly and installation guidelines Installation dimen...

Page 17: ...140 10 390 1AE80 482 466 8 3 390 1AF30 530 500 15 390 1AJ30 830 800 15 390 9BC00 2000 Drillings only left 15 Unit pack 10 pieces Measures in mm For the communication between the modules the System 30...

Page 18: ...upply by screwing 7 Take a backplane bus connector and click it at the CPU from the backside like shown in the picture 8 Stick the CPU to the profile rail right from the power supply and pull it to th...

Page 19: ...e on the left side shows the cabling step by step from top view 1 For cabling you push the locking vertical to the inside with a suiting screwdriver and hold the screwdriver in this position 2 Insert...

Page 20: ...to top res from top to bottom if the cables should be led out at the top 6 Bolt also the connection screws of not cabled screw clamps 7 Fix the cable binder for the cable bundle 8 Push the release key...

Page 21: ...cable bundle and the front connector 7 Fix the cable binder for the cable bundle 8 Bolt the fixing screw of the front connector 9 Now the front connector is electrically connected with your module 10...

Page 22: ...hen installing your components Install a central connection between the ground and the pro tected earth conductor system Connect all inactive metal extensive and impedance low Please try not to use al...

Page 23: ...you should always lay the isolation of cables on both sides Only by means of the both sided connection of the isolation you achieve high quality interference suppression in the higher frequency area...

Page 24: ...EDs for operating state and diagnostics n Real time clock battery buffered n Digital I Os DI 16xDC24V DO 8xDC 24V 0 5A n 2 channels for counter frequency measurement and pulse width modulation n I O a...

Page 25: ...part 4 Operating mode switch CPU 5 Slot for DC 24V power supply 6 Twisted pair interface for Ethernet PG OP channel 7 PtP interface 8 MPI interface The components 5 8 are under the front flap CPU 312...

Page 26: ...inst polarity inversion and over current n The internal electronic is galvanically connected with the supply voltage 9pin SubD jack n The MPI interface serves for the connection between program ming u...

Page 27: ...ns of the SFC 216 SER_CFG The communication hap pens by means of the SFC 217 SER_SND and SFC 218 SER_RCV 8pin RJ45 jack n The RJ45 jack serves the interface to the Ethernet PG OP channel n This interf...

Page 28: ...nput 16xDC 24V with interrupt capability n Digital Output 8xDC 24V 0 5A n Technological functions 2 channels X11 CAUTION Please regard that the voltage at an output channel is always the supply voltag...

Page 29: ...3 Channel 1 A Pulse 6 I 0 4 Channel 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 9 I 0 7 10 not used 11 not used 12 I 1 0 13 I 1 1 14 I 1 2 15 I 1 3 16 I 1 4 Channel 0 Latch 17 I 1 5 Channel 1 Lat...

Page 30: ...is recognized and the according LED is activated Pin assignment X11 DO Pin Assignment 21 2L Power supply DC 24V 22 O 0 0 Channel 0 Output 23 O 0 1 Channel 1 Output 24 Q 0 2 25 Q 0 3 26 Q 0 4 27 Q 0 5...

Page 31: ...ard 4 2 5 Storage media slot n As external storage medium for applications and firmware you may use a MMC storage module Multimedia card n The VIPA storage media are pre formatted with the PC format F...

Page 32: ...ffer time continu ously Only after a charging time of 24 hours there is a buffer for max 30 days CAUTION After a power reset and with an empty battery the CPU starts with a BAT error and executes an o...

Page 33: ...re is a system fault More information may be found in the diagnostics buffer of the CPU X X X X Variables are forced X X X X Access to the memory card X BB Blinking with 10Hz Configuration is loaded O...

Page 34: ...th the Siemens TIA Portal the number of timer and counters is limited to the maximum possible number of the corresponding Sie mens CPU Order no 312 5BE13 Type CPU 312SC SPEED Bus Technical data power...

Page 35: ...61131 2 type 1 Initial data size 2 Byte Technical data digital outputs Number of outputs 8 Cable length shielded 1000 m Cable length unshielded 600 m Rated load voltage DC 24 V Reverse polarity protec...

Page 36: ...circuit protection of output yes electronic Trigger level 1 A Number of operating cycle of relay outputs Switching capacity of contacts Output data size 1 Byte Technical data analog inputs Number of i...

Page 37: ...anges Operational limit of resistance thermometer ranges Operational limit of resistance thermometer ranges with SFU Basic error limit thermoresistor ranges Basic error limit thermoresistor ranges wit...

Page 38: ...Output voltage ranges Operational limit of voltage ranges Basic error limit voltage ranges with SFU Destruction limit against external applied voltage Current outputs Max in load resistance current ra...

Page 39: ...B Load memory maximum 512 KB Work memory integrated 64 KB Work memory maximal 512 KB Memory divided in 50 program 50 data Memory card slot MMC Card with max 1 GB Hardware configuration Racks max 1 Mod...

Page 40: ...ential difference between inputs and Mintern Uiso Max potential difference between Mintern and outputs Insulation tested with DC 500 V Command processing times Bit instructions min 0 02 s Word instruc...

Page 41: ...maximal 128 Byte Output process image maximal 128 Byte Digital inputs 272 Digital outputs 264 Digital inputs central 272 Digital outputs central 264 Integrated digital inputs 16 Integrated digital out...

Page 42: ...ality Sub D interfaces Type X2 Type of interface RS485 Connector Sub D 9 pin female Electrically isolated MPI MP I MPI RS232 DP master DP slave Point to point interface Type X3 Type of interface RS485...

Page 43: ...PV1 Transmission speed min Transmission speed max Number of DP slaves max Address range inputs max Address range outputs max User data inputs per slave max User data outputs per slave max Functionalit...

Page 44: ...l STX ETX protocol 3964 R protocol RK512 protocol USS master protocol Modbus master protocol Modbus slave protocol Special protocols Functionality RJ45 interfaces Type X5 Type of interface Ethernet 10...

Page 45: ...no 312 5BE13 Operating temperature 0 C to 60 C Storage temperature 25 C to 70 C Certifications UL certification yes VIPA System 300S Hardware description Technical data HB140 CPU SC 312 5BE13 GB 15 5...

Page 46: ...e transferred from the MMC into the work memory of the CPU If no MMC is plugged the CPU transfers permanent stored protected blocks into the work memory if available n Depending on the position of the...

Page 47: ...hen a cycle has been completed Maximally 8 modules may be addressed by the CPU 312 5BE13 The extension by means of extension racks is not possible You may access the modules with read res write access...

Page 48: ...Access Assignment DI10 DO6 124 Byte Digital input I 0 0 I 0 7 125 Byte Digital input I 1 0 I 1 7 Counter 768 DInt Channel 0 Counter value Frequency value 772 DInt Channel 1 Counter value Frequency va...

Page 49: ...horough knowledge of the Siemens SIMATIC Manager and the Siemens hardware configurator is required Please consider that this SPEED7 CPU has 4 ACCUs After an arithmetic operation I I I I D D D D MOD R...

Page 50: ...ou to program and remote control your CPU The PG OP channel also gives you access to the internal web page that contains information about firmware version connected I O devices current cycle times et...

Page 51: ...ype in the IP configuration like IP address subnet mask and gateway 6 Confirm with Assign IP configuration Direct after the assignment the Ethernet PG OP channel may be reached online by these address...

Page 52: ...CPU Description of the parameters of the sub modules DI10 DO6 and Counter Chapter 6 Deployment I O periphery on page 90 5 8 2 CPU parameters The CPU does not evaluate each parameter which may be set...

Page 53: ...The maximum time for the transfer of parameters to parameterizable modules If not every module has been assigned parameters by the time this monitoring time has expired the actual configuration becom...

Page 54: ...clic interrupt is processed With priority 0 the corresponding interrupt is deactivated n Execution Enter the time intervals in ms in which the watchdog interrupt OBs should be processed The start time...

Page 55: ...ing devices A cable has to be terminated with its surge impedance For this you switch on the terminating resistor at the first and the last participant of a network or a segment Please make sure that...

Page 56: ...ystem dependent you get a message that the projected system differs from target system This message may be accepted by OK Your project is transferred and may be executed in the CPU after transfer 5 9...

Page 57: ...r the diagnosis entries you select PLC Module Information in the Siemens SIMATIC Manager Via the register Diagnostic Buffer you reach the diagnosis window Information about the event IDs Chapter 5 19...

Page 58: ...D50144C1 IP Address 172 20 120 62 SubnetMask 255 255 255 0 Gateway 172 20 120 62 Ethernet PG OP Addresses Cpu state Run CPU state FunctionRS485 X2 COM1 MPI FunctionRS485 X3 COM2 PtP Operating mode RS4...

Page 59: ...RT UP and RUN require a specific reaction from the system program In this case the application interface is often provided by a call to an organization block that was included specifically for this ev...

Page 60: ...s possible with STL If necessary switch the view via View STL to STL n The block must be opened online and must not be protected 1 Activate View Breakpoint Bar 2 Set the cursor to the command line whe...

Page 61: ...utputs The outputs are disabled central analog outputs The outputs are disabled n Voltage outputs issue 0V n Current outputs 0 20mA issue 0mA n Current outputs 4 20mA issue 4mA If configured also subs...

Page 62: ...be switched to STOP For this switch the operating mode switch of the CPU to STOP The STOP LED is on Overall reset 1 Switch the operating mode switch to MRES position for about 3 seconds The STOP LED c...

Page 63: ...ere is the opportunity to execute a firmware update for the CPU and its components via MMC For this an accordingly prepared MMC must be in the CPU during the startup n So a firmware files can be recog...

Page 64: ...ides the access to this web site PLC Assign Ethernet Address After that you may access the PG OP channel with a web browser via the IP address of the project engineering Chapter 5 10 Access to the int...

Page 65: ...ge 66 1 Switch the operating mode switch of your CPU in position STOP Turn off the voltage supply Plug the MMC with the firm ware files into the CPU Please take care of the correct plug in direction o...

Page 66: ...Switch the CPU to STOP 2 Push the operating mode switch down to position MRES for 30s Here the STOP LED flashes After a few seconds the stop LED changes to static light Now the STOP LED changes betwe...

Page 67: ...t to factory setting or an empty PROTECT WLD is loaded The CPU checks if a MCC memory extension card is put If exists the memory extension is enabled otherwise a memory expansion which was activated b...

Page 68: ...nager at Module Information Memory CAUTION Please regard that the MCC must remain plugged when you ve executed the memory expansion at the CPU Oth erwise the CPU switches to STOP after 72 hours The MC...

Page 69: ...ay protect OBs FBs and FCs When back reading the protected blocks into the PG exclusively the block header are loaded The block code that is to be protected remains in the CPU and cannot be read Creat...

Page 70: ...h consists of a command sequence to be stored as vipa_cmd mmc in the root directory of the MMC The file has to be started by CMD_START as 1 command fol lowed by the desired commands no other text and...

Page 71: ...s shown in the following The corre sponding diagnostics entry is put in parenthesizes Example 1 CMD_START Marks the start of the command sequence 0xE801 LOAD_PROJECT proj wld Execute an overall reset...

Page 72: ...additional specific entries in form of event IDs The current content of the diagnostics buffer is stored at the memory card by means of the CMD DIAGBUFF Every register of the module information is su...

Page 73: ...ot fit into periphery area 0xE008 Internal error Please contact the VIPA Hotline 0xE009 Error on accessing the standard backplane bus 0xE010 There is a undefined module at the backplane bus ZInfo2 Slo...

Page 74: ...Frame format error 4 Wrong SSL request SSL ID not valid 5 Wrong SSL request SSL SubID not valid 6 Wrong SSL request SSL Index not valid 7 Wrong value 8 Wrong RetVal 9 Wrong SAP 10 Wrong connection ty...

Page 75: ...bled The interface acts fur ther as MPI interface 0xE403 The PROFIBUS DP slave functionality is disabled The interface acts further as MPI interface 0xE500 Memory management Deleted block without corr...

Page 76: ...of SET_NETWORK is faulty 0xE8FC CMD Auto command Error Some IP parameters missing in SET_NET WORK 0xE8FE CMD Auto command Error CMD_START missing 0xE8FF CMD Auto command Error Error while reading CMD...

Page 77: ...Record set number ZInfo3 Record set length 0xEA14 SBUS Multiple parametrization of a periphery address diagnostics address ZInfo1 Periphery address ZInfo2 Slot ZInfo3 Data width 0xEA15 Internal error...

Page 78: ...or There is no PROFINET IO controller at the configured slot ZInfo1 User slot of the PROFINET I O controller ZInfo2 Recognized ID at the configured slot 0xEA53 Error PROFINET configuration There are t...

Page 79: ...Obtain an IP address in a different way is not supported for the IP address of the controller 0xEA65 Internal error Please contact the VIPA Hotline 0xEA66 PROFINET IO controller Error in communication...

Page 80: ...e VIPA Hotline 0xEA6A PROFINET IO controller Service error in communication stack PK Rackslot OBNo ServiceIdentifier DatId 0 ZInfo1 ServiceError Code ZInfo2 ServiceError Detail ZInfo3 StackError Error...

Page 81: ...d 0 ZInfo1 Device ID ZInfo2 ZInfo3 0xEA6F PROFINET IO controller PN module mismatch PK Rackslot OBNo PLC Mode DatId 0 ZInfo1 Device ID ZInfo2 ZInfo3 0xEA97 Storage error SBUS service channel ZInfo3 Sl...

Page 82: ...rrors which occurred 0xEAB0 Link mode not valid OBNo Current PLC mode ZInfo1 Diagnostics address master controller Zinfo2 Current LinkMode 0x01 10Mbit full duplex 0x02 100Mbit half duplex 0x03 100Mbit...

Page 83: ...iguration of a periphery address ZInfo1 Periphery address ZInfo2 Slot 0xEC10 EtherCAT Restoration bus with its slaves OB start Info Local data StartEvent and Eventclass 0xEC10 DatID 0xXXYY XX 0x54 wit...

Page 84: ...ble YY 0x01 Station available process data ZInfo1 0xXXYY XX OldState YY NewState ZInfo2 Diagnostics of the Station ZInfo3 AlStatusCode 0xEC30 EtherCAT Topology OK OB start Info Local data StartEvent a...

Page 85: ...put address YY 0x00 Station not available YY 0x01 Station available process data ZInfo1 0xXXYY XX OldState YY NewState ZInfo2 Diagnostics address of the master ZInfo3 Number of stations which are not...

Page 86: ...lass 0xED30 ZInfo2 Diagnostics address of the master 0xED31 EtherCAT Interrupt Queue Overflow OB start Info Local data StartEvent and Eventclass 0xED31 ZInfo2 Diagnostics address of the master 0xED40...

Page 87: ...h byte DatID 1 2 Subindex ZInfo1 Index ZInfo2 SDO error code high word ZInfo3 SDO error code low word 0xED70 EtherCAT Diagnostics buffer CP Twice HotConnect group found PK 0 OB PLC Mode DatID 1 2 0 ZI...

Page 88: ...processing of statuses does not change the execution of the program It only shows that the data displayed is no longer valid At the breakpoint the CPU stops collecting data for the status display and...

Page 89: ...C and D The process image of binary and digital operands is modified independently of the operating mode of the CPU When the operating mode is RUN the program is executed with the modified process var...

Page 90: ...cal functions and standard I Os may be used simultaneously with appropriate hardware Read access to inputs used by technological functions is possible Write access to used outputs is not possible Up t...

Page 91: ...Input 16xDC 24V with interrupt capability n Digital Output 8xDC 24V 0 5A n Technological functions 2 channels X11 CAUTION Please regard that the voltage at an output channel is always the supply volt...

Page 92: ...I 0 3 Channel 1 A Pulse 6 I 0 4 Channel 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 9 I 0 7 10 not used 11 not used 12 I 1 0 13 I 1 1 14 I 1 2 15 I 1 3 16 I 1 4 Channel 0 Latch 17 I 1 5 Channel 1...

Page 93: ...ut is recognized and the according LED is activated Pin assignment X11 DO Pin Assignment 21 2L Power supply DC 24V 22 O 0 0 Channel 0 Output 23 O 0 1 Channel 1 Output 24 Q 0 2 25 Q 0 3 26 Q 0 4 27 Q 0...

Page 94: ...ut I 0 0 I 0 7 125 Byte Digital Input I 1 0 I 1 7 Counter 768 DInt Channel 0 Count value Frequency value 772 DInt Channel 1 Count value Frequency value 776 DInt reserved 780 DInt reserved Sub module D...

Page 95: ...I 1 1 Pin assignment X11 DI Pin Assignment 1 1L Power supply DC 24V 2 I 0 0 Channel 0 A Pulse 3 I 0 1 Channel 0 B Direction 4 I 0 2 Channel 0 HW gate 5 I 0 3 Channel 1 A Pulse 6 I 0 4 Channel 1 B Dire...

Page 96: ...the input is recognized and the according LED is activated Pin assignment X11 DO Pin Assignment 21 2L Power supply DC 24V 22 O 0 0 Channel 0 Output 23 O 0 1 Channel 1 Output 24 Q 0 2 25 Q 0 3 26 Q 0...

Page 97: ...resses are used 6 4 1 1 Address assignment Sub module Default address Access Assignment DI10 DO6 124 Byte Digital Input I 0 0 I 0 7 125 Byte Digital Input I 1 0 I 1 7 Counter 768 DInt Channel 0 Count...

Page 98: ...in groups of four Please note that in the parameter window only the value 0 1ms may be set At the other values 0 35ms is internally used for input delay There are no parameters for the digital output...

Page 99: ...he CPU 5 As soon as an operating mode to the corresponding channel is selected a dialog window for this operating mode is created and displayed and filled with default parameters 6 Execute the wished...

Page 100: ...inputs are available at the same time you may set the input assignment for every counter via the parameterization For each counter the following inputs are available n Channelx A Pulse input for coun...

Page 101: ...may be selected You have the following options n None There is no interrupt triggered n Process The counting function triggers a hardware interrupt n Diagnostics and Process With the 312 5BE13 the di...

Page 102: ...rack A pulse track B direction and hardware gate signals in fixed steps 10 5 2 1kHz 10kHz max frequency Latch You can set the maximum frequency of the latch signal in fixed steps 10 5 2 1kHz 10kHz Sig...

Page 103: ...cteristics of the output is not no comparison n activated n deactivated deactivated Hardware inter rupt Overflow In the activated state a hardware interrupt is generated in the event of an overflow ex...

Page 104: ...12 1 FALSE Status of the hardware gate STS_LTCH BOOL 12 2 FALSE Status of the latch input STS_DO BOOL 12 3 FALSE Status of the output STS_C_DN BOOL 12 4 FALSE Status of the down count Always indicate...

Page 105: ...start counting JOB_OVAL DINT 28 0 Output value for read request RES10 BOOL 32 0 FALSE reserved RES11 BOOL 32 1 FALSE reserved RES_STS BOOL 32 2 FALSE Reset status bits Resets the status bits STS_CMP S...

Page 106: ...after a CPU STOP RUN transition 2 Call the SFB The job is processed immediately JOB_DONE only applies to SFB run with the result FALSE JOB_ERR TRUE if an error occurred Details on the error cause are...

Page 107: ...46 231 2 Writing comparison value 2147483648 231 2147483647 231 1 Writing hysteresis 0 255 Writing pulse duration 0 510ms Single periodic count main count direction up Job Valid range End value 2 2147...

Page 108: ...process interrupt Via the parameterization you have the opportunity to define a main counting direction for every counter If none is chosen the complete counting range is available Limits Valid value...

Page 109: ...47 231 1 With overflow or underflow the status bits STS_OFLW respectively STS_UFLW are set These bits remain set until these are reset with RES_STS If enabled additionally a process interrupt is trigg...

Page 110: ...d value 1 in positive direction it jumps to the load value at the next positive count pulse and the gate is automatically closed n To restart the count process you must create a positive edge of the g...

Page 111: ...er starts with the load value Limits Valid value range Limit value 2 147 483 648 231 to 2 147 483 646 231 2 Upper count limit 2 147 483 647 231 1 No main counting direction n The counter counts forwar...

Page 112: ...itive count pulse Limits Valid value range Limit value 2 147 483 647 231 1 to 2 147 483 647 231 1 Lower count limit 2 147 483 648 231 Main counting direction backwards n The counter counts backwards s...

Page 113: ...in the latch register n Comparison You may set a comparison value that activates res de activates a digital output res releases a hardware interrupt depending on the counter value n Hysteresis The set...

Page 114: ...at hardware gatex input of the module SW gate open activate In application program by setting SW_GATE of the SFB 47 close deactivate In application program by reset ting SW_GATE of the SFB 47 The para...

Page 115: ...rdware gate Gate control via SW gate canceling HW gate deactivated gate function Cancel count SW gate HW gate Reaction Counter edge 0 1 deactivated Restart with load value Gate control via SW gate sto...

Page 116: ...ocess an edge 0 1 is recognized at the Latch input of a counter the recent counter value is stored in the according latch register The latch value may be accessed by the parameter LATCHVAL of the SFB...

Page 117: ...condition is no longer fulfilled With pulse time 0 the output is as set as the comparison condition is fulfilled Pulse duration For adaptation to the used actors a pulse duration may be speci fied Th...

Page 118: ...ctive 7 Leave hysteresis range output remains set for counter value comparison value With reaching the comparison condition the hysteresis gets active At active hysteresis the comparison result remain...

Page 119: ...e of the parameterized pulse duration is put out the hysteresis is activated and the counting direction stored 2 Leaving the hysteresis range contrary to the stored counting direc tion pulse of the pa...

Page 120: ...et the integration time in the parameter assignment screen forms or you can edit them in the job interface of the SFB FREQUENC SFB 48 1 Integration time 2 Count pulse 3 Internal gate SW gate 4 Start o...

Page 121: ...wer supply DC 24V 2 I 0 0 Channel 0 A Pulse 3 I 0 1 Channel 0 B Direction 4 I 0 2 Channel 0 HW gate 5 I 0 3 Channel 1 A Pulse 6 I 0 4 Channel 1 B Direction 7 I 0 5 Channel 1 HW gate 8 I 0 6 9 I 0 7 10...

Page 122: ...nding channel a dialog window for the fre quency measurement is created and displayed and filled with default parameters 6 Execute the wished parameterization 7 Store the project with Station Save and...

Page 123: ...e frequency measurement n The SFB is to be called with the corresponding instance DB Here the parameters of the SFB are stored n Among others the SFB 48 contains a request interface Hereby you get rea...

Page 124: ...ddress Instance DB Default Comment JOB_OVAL DINT 28 0 Output value for read request Per channel you may call the SFB in each case with the same instance DB since the data necessary for the internal op...

Page 125: ...h Job error ID 0000h No error 0221h Integration time too low 0222h Integration time too high 02FFh Invalid job ID 8001h Parameter error 8009h Channel no not valid 1 A new job may be started with JOB_D...

Page 126: ...y 3 Pulse duration 4 Pulse pause During pulse width modulation the count function at the same channel is deactivated For pulse width modulation connect your actuators to the following pins Channel 0 P...

Page 127: ...dialog window for the pulse width modulation is created and displayed and filled with default parameters 6 Execute the wished parameterization 7 Save the project with Station Save and compile 8 Trans...

Page 128: ...ulse duration Output format Range of values Pulse duration Per mil Default 0 1000 Output value 1000 x Period duration S7 analog value 0 27648 Output value 27648 x Period duration Time base n Set the t...

Page 129: ...request interface Hereby you get read and write access to the registers of the pulse width modulation n So that a new job may be executed the previous job must have be finished with JOB_DONE TRUE n Pe...

Page 130: ...st Per channel you may call the SFB in each case with the same instance DB since the data necessary for the internal operational are stored here Writing accesses to outputs of the instance DB is not p...

Page 131: ...ith the result FALSE JOB_ERR TRUE if an error occurred Details on the error cause are indi cated at JOB_STAT Name Data type Address DB Default Comment JOB_DONE BOOL 22 0 TRUE New job can be started JO...

Page 132: ...iagnostic and interrupt The parameterization allows you to define the following trigger for a hardware interrupt that may initialize a diagnostic interrupt Counter function n Edge at a digital input n...

Page 133: ...0 n Bit 0 Gate counter 0 open activated n Bit 1 Gate counter 0 closed n Bit 2 Over underflow end value counter 0 n Bit 3 Counter 0 reached comparison value n Bit 4 Gate counter 1 open activated n Bit...

Page 134: ...curring at other channels that may also cause a process res diagnostic inter rupt these are interim stored After the end of the diagnostic interrupt processing at first all interim stored diagnostic i...

Page 135: ...iagnostic interrupt is not longer possible The record sets of the diagnostic range have the following structure Byte Bit 7 0 0 n Bit 0 set at module failure n Bit 1 0 fix n Bit 2 set at external error...

Page 136: ...Byte Bit 7 0 0 3 Content record set 0 Record set 0 Diagnosticincoming on page 135 4 n Bit 6 0 Channel type here 70h 70h Digital input 71h Analog input 72h Digital output 73h Analog output 74h Analog...

Page 137: ...3 0 fix n Bit 7 4 reserved 11 n Bit 7 0 reserved 12 Diagnostic interrupt due to process interrupt lost at n Bit 0 gate counter 0 closed n Bit 1 0 fix n Bit 2 gate counter 0 opened n Bit 3 0 fix n Bit...

Page 138: ...nnel group 1 I 0 4 I 0 7 n Bit 2 Error in channel group 2 I 1 0 I 1 1 n Bit 3 reserved n Bit 4 Error in channel group 4 Frequency meter 0 n Bit 5 Error in channel group 5 Frequency meter 1 n Bit 6 res...

Page 139: ...e specific diagnostic data The diagnostic bytes have the following assignment Byte Bit 7 0 0 3 Content record set 0 Record set 0 Diagnosticincoming on page 135 4 n Bit 6 0 Channel type here 70h 70h Di...

Page 140: ...terrupt lost at n Bit 0 input I 0 4 n Bit 1 0 fix n Bit 2 input I 0 5 n Bit 3 0 fix n Bit 4 input I 0 6 n Bit 5 0 fix n Bit 6 input I 0 7 n Bit 7 0 fix 10 Diagnostic interrupt due to process interrupt...

Page 141: ...SND The FCs SFCs are included in the con signment of the CPU The following FCs SFCs are used for the serial communication FC SFC Description FC SFC 216 SER_CFG RS485 parameterize FC SFC 217 SER_SND RS...

Page 142: ...PtP The RS485 interface from the CPU is fix set to PtP communication Parameterization and communication happens by means of SFCs n Logical states represented by voltage differences between the two cor...

Page 143: ...on 7 4 1 FC SFC 216 SER_CFG The parametrization happens during runtime deploying the FC SFC 216 SER_CFG You have to store the parameters for STX ETX 3964R USS and Modbus in a DB RS485 Connection Descr...

Page 144: ...x 0 008s 154bit 9Ah Hex value is 9Ah Here you fix the protocol to be used You may choose between 1 ASCII 2 STX ETX 3 3964R 4 USS Master 5 Modbus RTU Master 6 Modbus ASCII Master At ASCII protocol this...

Page 145: ...1200baud 05h 1800baud 06h 2400baud 07h 4800baud 08h 7200baud 09h 9600baud 0Ah 14400baud 0Bh 19200baud 0Ch 38400baud 0Dh 57600baud 0Eh 115200baud Number of data bits where a character is mapped to 0 5b...

Page 146: ...at PARITY 6 Error at STOPBITS 7 Error at FLOWCONTROL 809xh Error in FC SFC parameter value x where x 1 Error at PROTOCOL 3 Error at BAUDRATE 4 Error at CHARLENGTH 5 Error at PARITY 6 Error at STOPBIT...

Page 147: ...YTE 124 Word where the number of the sent Bytes is stored At ASCII if data were sent by means of FC SFC 217 faster to the serial interface than the interface sends the length of data to send could dif...

Page 148: ...1024byte 9002h Data too short 0byte 9004h Character not allowed 3964R Value Description 2000h Send ready without error 80FFh NAK received error in communication 80FEh Data transfer without acknowledge...

Page 149: ...lave respond 2001h Send ready negative slave respond 8080h Receive buffer overflow no space for receipt 8090h Acknowledgement delay time exceeded 80F0h Wrong checksum in respond 80FDh Length of respon...

Page 150: ...lustrates the structure of programming a send command for the different protocols 3964R Principles of program ming VIPA System 300S Deployment PtP communication Communication FC SFC 217 SER_SND HB140...

Page 151: ...USS Modbus ASCII STX ETX VIPA System 300S Deployment PtP communication Communication FC SFC 217 SER_SND HB140 CPU SC 312 5BE13 GB 15 50 151...

Page 152: ...BYTE 124 Word where the number of received Bytes is stored At STX ETX and 3964R the length of the received user data or 0 is entered At ASCII the number of read characters is entered This value may b...

Page 153: ...fer Return values of the block Error code Description 0000h no error 1000h Receive buffer too small data loss 8x24h Error at FC SFC Parameter x with x 1 Error at DATAPTR 2 Error at DATALEN 3 Error at...

Page 154: ...data that is in the buffer at request time in a parameterized receive data block If a tele gram is spread over various cycles the data is overwritten There is no reception acknowledgement The communic...

Page 155: ...Start and End ID to the communication partner n You may work with 1 2 or no Start and with 1 2 or no End ID n If no End ID is defined all read characters are transferred to the CPU after a parameteriz...

Page 156: ...n The DLE duplica tion is reversed in the receiving station The 3964R procedure requires that a lower priority is assigned to the communication partner When communi cation partners issue simultaneous...

Page 157: ...ective value IND Index BCC Block Check Character PWE Parameter value A request can be directed to a certain slave ore be send to all slaves as broadcast message For the identification of a broadcast m...

Page 158: ...The mode selection hap pens during runtime by using the FC SFC 216 SER_CFG n ASCII mode Every byte is transferred in the 2 sign ASCII code The data are marked with a start and an end sign This causes...

Page 159: ...s a Modbus master can access a Modbus slave With the following Modbus function codes a Modbus master can access a Modbus slave The description always takes place from the point of view of the master C...

Page 160: ...sums CRC at RTU and LRC at ASCII mode are automatically added to every telegram They are not shown in the data block Code 01h Read n bits of master output area 0x Code 02h Read n bits of master input...

Page 161: ...1word max 125words Code 05h Write 1 bit to master output area 0x A status change is via Status bit with following values Status bit 0000h Bit 0 Status bit FF00h Bit 1 Command telegram Slave address F...

Page 162: ...ease regard that the number of bits has additionally to be set in byte Command telegram Slave address Func tion code Address 1 bit Number of bits Number of bytes Data 1 byte Data 2 byte Check sum CRC...

Page 163: ...e n Siemens SIMATIC Manager and possibilities for the project transfer n Modbus cable connection 1 Assemble a Modbus system consisting of a CPU 31xS as Modbus master and a CPU 21xSER 1 as Modbus slave...

Page 164: ...B and error evaluation n OB 1 Call SFC 217 SER_SND for data transport from the slave CPU to the output buffer Call SFC 218 SER_RECV for the data transport from the input buffer to the CPU Allow an acc...

Page 165: ...VIPA System 300S Deployment PtP communication Modbus Example communication HB140 CPU SC 312 5BE13 GB 15 50 165...

Page 166: ...ing is part of this manual n Windows XP SP3 n Windows Vista n Windows 7 32 and 64 bit n Windows 8 32 and 64 bit You may receive a demo version from VIPA Without any activation with the demo version th...

Page 167: ...in the following fields n Email Addr n Your Name n Serial number The serial number may be found on a label at the CD case of WinPLC7 4 If your computer is connected to Internet you may online request...

Page 168: ...module are installed and cabled n The Ethernet PG OP channel of the CPU is connected to your Ethernet network Your CPU may be connected to your PC with an Ethernet cable either directly or via hub swi...

Page 169: ...U a dialog with the same name 10 Click to Accessible nodes Please regard to use this function it is necessary to install WinPCap before 11 Choose your network card and click to Determining accessible...

Page 170: ...rs In the upper part of the editor there is the parameter table In this example the 2 integer values value1 and value2 are to be compared together Since both values are read only by the function these...

Page 171: ...ield designated as empty The available operations may be added to your project by drag drop from the hardware catalog or by double click at them in the hardware cat alog 3 Open in the catalog the cate...

Page 172: ...nished now Adding a new network For further comparisons the operations CMP I at Q 124 1 and CMP I at Q 124 2 are necessary Create a network for both opera tions with the following proceeding 1 Move yo...

Page 173: ...g structure The FC 1 is to be called from the cycle OB 1 1 Go to OB 1 which was automatically created with starting the project 2 Go to Project content or to Solution and open the OB 1 by a double cli...

Page 174: ...all blocks into the PLC 3 Switch the CPU to RUN by clicking at RUN in the CPU Control Center of Edit project The displayed state changes from STOP to RUN 4 To view the process image select View Displ...

Page 175: ...U is graphically displayed 2 Double click to the output module open its properties dialog and enter the Module address 124 3 Switch the operating mode switch to RUN by means of the mouse Your program...

Page 176: ...ransfer your project to your CPU with PLC Send all blocks 8 Switch your CPU to RUN state 9 Open the OB 1 by double click 10 Change the value of one variable save the OB 1 and transfer it to the CPU Ac...

Page 177: ...settings used With the menu Project Exit in the Project view you may exit the TIA Portal Here there is the possibility to save changes of your project before 9 1 2 Work environment of the TIA Portal...

Page 178: ...iguration CPU With the Siemens TIA Portal the CPU 312 5BE13 from VIPA is to be configured as CPU 312C 6ES7 312 5BE03 0AB0 V2 6 from Sie mens 1 Start the Siemens TIA Portal 2 Create a new project in th...

Page 179: ...erties dialog Here you can make your parameter settings Chapter 5 8 CPU parametrization on page 52 9 3 TIA Portal Hardware configuration I O modules After the hardware configuration of the CPU place t...

Page 180: ...mote control your CPU n The Ethernet PG OP channel also gives you access to the internal web page that contains information about firmware version con nected I O devices current cycle times etc n At t...

Page 181: ...tree at Online access and choose here by a doubleclick your network card which is connected to the Ethernet PG OP channel 4 To get the stations and their MAC address use the Accessible device The MAC...

Page 182: ...7 343 1EX11 0XE0 always as last module after the really plugged modules 5 Open the Property dialog by clicking on the CP 343 1EX11 and enter for the CP at Properties at Ethernet address the IP address...

Page 183: ...mens TIA Portal with your project 2 Select the Project view 3 Choose Libraries from the Task cards on the right side 4 Click at Global libraries 5 Click at Open global library 6 Navigate to your direc...

Page 184: ...tialization Please consider to use the same IP address data in your project for the CP 343 1 1 For the transfer connect if not already done the appropriate Ethernet jack to your Ethernet 2 Open your p...

Page 185: ...that your user memory serves for enough space for your user program otherwise your user program is not completely loaded and the SF LED gets on When a memory card has been installed the write command...

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Summary of Contents for CPU 312SC

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VIPA CPU 312SC, User Manual, Page: 16 / 185

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Summary of Contents for CPU 312SC

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