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EMAC Control Module Registers
3.8
EMAC Control Module Miscellaneous Interrupt Enable Register (CMMISCINTEN)
The miscellaneous interrupt enable register (CMMISCINTEN) is shown in
Figure 19
and described in
Table 15
.
Figure 19. EMAC Control Module Miscellaneous Interrupt Enable Register (CMMISCINTEN)
31
16
Reserved
R-0
15
4
3
2
1
0
Reserved
STATPENDINTEN
HOSTPENDINTEN
LINKINTEN
USERINTEN
R-0
R/W-0
R/W-0
R/W-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 15. EMAC Control Module Miscellaneous Interrupt Enable Register (CMMISCINTEN)
Field Descriptions
Bit
Field
Value
Description
31-4
Reserved
0
Reserved
3
STATPENDINTEN
EMAC module statistics interrupt (STATPEND) enable.
0
EMAC module statistics interrupt (STATPEND) is disabled.
1
EMAC module statistics interrupt (STATPEND) is enabled.
2
HOSTPENDINTEN
EMAC module host error interrupt (HOSTPEND) enable.
0
EMAC module host error interrupt (HOSTPEND) is disabled.
1
EMAC module host error interrupt (HOSTPEND) is enabled.
1
LINKINTEN
MDIO module link change interrupt (LINKINT) enable.
0
MDIO module link change interrupt (LINKINT) is disabled.
1
MDIO module link change interrupt (LINKINT) is enabled.
0
USERINTEN
MDIO module user interrupt (USERINT) enable.
0
MDIO module user interrupt (USERINT) is disabled.
1
MDIO module user interrupt (USERINT) is enabled.
65
SPRUFI5B – March 2009 – Revised December 2010
Ethernet Media Access Controller (EMAC)/Management Data Input/Output
(MDIO)
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