Texas Instruments CC3120MOD, Manual

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Table 8-7 lists the timing parameters for the I2S receive mode.
Table 8-7. I2S Receive Mode Timing Parameters
ITEM NAME DESCRIPTION MIN MAX UNIT
T1 f
clk
(1)
Clock frequency 9.216 MHz
T2 t
LP (1)
Clock low period 1/2 f
clk
ns
T3 t
HT
(1)
Clock high period 1/2 f
clk
ns
T4 t
OH
(1)
RX data hold time 0 ns
T5 t
OS
(1)
RX data setup time 15 ns
(1) Timing parameter assumes a maximum load of 20 pF.
8.14.5.3 GPIOs
All digital pins of the module can be used as general-purpose input/output (GPIO) pins. The GPIO
module consists of four GPIO blocks, each of which provides eight GPIOs. The GPIO module supports 24
programmable GPIO pins, depending on the peripheral used. Each GPIO has configurable pullup and pulldown
strength (weak 10 µA), configurable drive strength (2, 4, and 6 mA), and open-drain enable.
Figure 8-12 shows the GPIO timing diagram.
SWAS031-067
V
DD
80%
20%
t
GPIOF
t
GPIOR
Figure 8-12. GPIO Timing Diagram
Table 8-8 lists the GPIO output transition times for V
BAT
= 2.3 V.
Table 8-8. GPIO Output Transition Times (V
BAT
= 2.3 V)
(1) (2)
DRIVE
STRENGTH (mA)
DRIVE STRENGTH
CONTROL BITS
T
r
T
f
UNIT
MIN NOM MAX MIN NOM MAX
2
2MA_EN=1
11.7 13.9 16.3 11.5 13.9 16.7 ns
4MA_EN=0
4
2MA_EN=0
13.7 15.6 18.0 9.9 11.6 13.6 ns
4MA_EN=1
6
2MA_EN=1
5.5 6.4 7.4 3.8 4.7 5.8 ns
4MA_EN=1
(1) V
BAT
= 2.3 V, T = 25°C, total pin load = 30 pF
(2) The transition data applies to the pins other than the multiplexed analog-digital pins 25, 26, 42, and 44.
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SWRS206E – MARCH 2017 – REVISED MAY 2021
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