Table 7-3. Pin Attributes and Pin Multiplexing (continued)
GENERAL PIN ATTRIBUTES
FUNCTION
PAD STATES
Pkg.
Pin
Pin
Alias
Use
Select
as
Wakeu
p
Source
Confi
g.
Addl.
Analo
g Mux
Muxed
With
JTAG
Dig. Pin
Mux
Config.
Reg.
Dig.
Pin
Mux
Confi
g.
Mode
Value
Signal Name
Signal
Description
Signa
l
Direct
ion
LPD
S
Hib
nRESET =
0
31
RF_BG
WLAN
analog
N/A
N/A
N/A
N/A
N/A
CC3220MOD
x:
RF BG band
CC3220MOD
Ax: NC
N/A
N/A
N/A
N/A
N/A
32
GND
GND
N/A
N/A
N/A
N/A
N/A
GND
GND
N/A
N/A
N/A
N/A
33
NC
WLAN
analog
N/A
N/A
N/A
N/A
NC
Reserved
34
SOP0
Config
sense
N/A
N/A
N/A
N/A
N/A
SOP0
Sense-on-
power 0
N/A
N/A
N/A
N/A
35
nRESET
Global
reset
N/A
N/A
N/A
N/A
N/A
nRESET
Master chip
reset. Active
low.
N/A
N/A
N/A
N/A
36
VBAT_
RESET
Global
reset
N/A
N/A
N/A
N/A
N/A
VBAT_RESE
T
VBAT to
nRESET
pullup resistor
N/A
N/A
N/A
N/A
37
VBAT1
Supply
input
N/A
N/A
N/A
N/A
N/A
VBAT1
Analog
DC/DC input
(connected to
chip input
supply
[VBAT])
N/A
N/A
N/A
N/A
38
GND
GND
N/A
N/A
N/A
N/A
N/A
GND
GND
N/A
N/A
N/A
N/A
39
NC
WLAN
analog
N/A
N/A
N/A
N/A
N/A
NC
Reserved
N/A
N/A
N/A
N/A
40
VBAT2
Supply
input
N/A
N/A
N/A
N/A
N/A
VBAT2
Analog input
supply VBAT
N/A
N/A
N/A
N/A
41
NC
WLAN
analog
N/A
N/A
N/A
N/A
N/A
NC
Reserved
N/A
N/A
N/A
N/A
42
GPIO30
I/O
No
User
config
not
requir
ed
No
GPIO_PA
D_
CONFIG_3
0
(0x4402
E118)
0
GPIO30
GPIO
I/O
Hi-Z,
Pull,
Drive
Hi-Z,
Pull,
Drive
Hi-Z
9
UART0_TX
UART0 TX
data
O
1
2
McACLK
I2S audio port
clock
O
Hi-Z,
Pull,
Drive
3
McAFSX
I2S audio port
frame sync
O
Hi-Z,
Pull,
Drive
4
GT_CCP05
Timer capture
port
I
Hi-Z,
Pull,
Drive
7
GSPI_MISO
General SPI
MISO
I/O
Hi-Z,
Pull,
Drive
43
GND
GND
N/A
N/A
N/A
N/A
N/A
GND
GND
N/A
N/A
N/A
N/A
SWRS206E – MARCH 2017 – REVISED MAY 2021
Copyright © 2021 Texas Instruments Incorporated
21
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