8
7
6
5
4
3
2
1
0
XOR
XOR
Tx out (modulating signal)
Tx data (DIO pin)
8
7
6
5
4
3
2
1
0
XOR
XOR
Rx pseudo random sequence
Rx in (Demodulated Rx data)
Rx out (DIO pin)
Tx pseudo random sequence
SWRS046H – NOVEMBER 2006 – REVISED MARCH 2015
Table 5-15. Crystal Oscillator Component Values
ITEM
C
L
= 12 pF
C
L
= 16 pF
C
L
= 22 pF
C4
6.8 pF
15 pF
27 pF
C5
6.8 pF
15 pF
27 pF
5.17 Built-in Test Pattern Generator
The CC1020 has a built-in test pattern generator that generates a PN9 pseudo random sequence. The
PN9_ENABLE bit in the MODEM register enables the PN9 generator. A transition on the DIO pin is
required after enabling the PN9 pseudo random sequence.
The PN9 pseudo random sequence is defined by the polynomial x
9
+ x
5
+ 1.
The PN9 sequence is ‘XOR’ed with the DIO signal in both TX and RX mode as shown in
.
Hence, by transmitting only zeros (DIO = 0), the BER (Bit Error Rate) can be tested by counting the
number of received ones. Note that the 9 first received bits should be discarded in this case. Also note
that one bit error will generate 3 received ones.
Transmitting only ones (DIO = 1), the BER can be tested by counting the number of received zeroes.
The PN9 generator can also be used for transmission of ‘real-life’ data when measuring narrowband ACP
(Adjacent Channel Power), modulation bandwidth or occupied bandwidth.
Figure 5-31. PN9 Pseudo-random Sequence Generator in TX and RX Mode
5.18 Interrupt on Pin DCLK
5.18.1 Interrupt Upon PLL Lock
In synchronous mode the DCLK pin on CC1020 can be used to give an interrupt signal to wake the
microcontroller when the PLL is locked.
56
Detailed Description
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