• Power dissipation, which can be a factor of the RDS(ON) rating of the FET, the FET package, and the
PCB design.
– The overdrive level of the BQ76942 device charge pump should be selected based on RDS(ON)
requirements for the protection FETs and their voltage handling requirements. If the FETs are selected
with a maximum gate-to-source voltage of 15 V, then the 11-V overdrive mode within the BQ76942 device
can be used. If the FETs are not specified to withstand this level, or there is a concern over gate leakage
current on the FETs, the lower overdrive level of 5.5 V can be selected.
• Sense resistor selection
– The resistance value should be selected to maximize the input range of the coulomb counter but not
exceed the absolute maximum ratings, and avoid excessive heat generation within the resistor.
• Using the normal maximum charge or discharge current, the sense resistor = 200 mV / 20.0 A = 10 mΩ
maximum.
• However, considering a short circuit discharge current of 80 A, the recommended maximum SRP, SRN
voltage of ≈0.75 V, and the maximum SCD threshold of 500 mV, the sense resistor should be below
500 mV / 80 A = 6.25-mΩ maximum.
– Further tolerance analysis (value tolerance, temperature variation, and so on) and PCB design margin
should also be considered, so a sense resistor of 1 mΩ is suitable with a 50-ppm temperature coefficient
and power rating of 1 W.
• The REG1 is selected to provide the supply for an external host processor, with output voltage selected for
3.3 V.
– The NPN BJT used for the REG0 preregulator should be selected to support the maximum collector-to-
emitter voltage of the maximum charging voltage of 42.5 V. The gain of the BJT should be chosen so it
can provide the required maximum output current with a base current level that can be provided from the
BQ76942 device.
– The BJT should support the maximum current expected from the REG1 (maximum of 45 mA, with short
circuit current limit of up to ≈80 mA).
– A diode can optionally be included in the collector circuit of the BJT, in order to avoid reverse current flow
from BREG through the base-collector junction of the BJT to PACK+ during a pack short circuit event. This
diode can be seen in
– A large resistor (such as 10 MΩ) is recommended from BREG to VSS to avoid any unintended leakage
current that may occur during SHUTDOWN mode.
16.2.3 Application Performance Plot
shows the error in measured temperature using an external Semitec 103-AT thermistor, the default
temperature polynomial, and the internal 18-kΩ pullup resistor.
SLUSE14B – DECEMBER 2020 – REVISED DECEMBER 2021
Copyright © 2021 Texas Instruments Incorporated
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