Texas Instruments ADS868 Series, Manual

Page: 44 / 67

1 2 13 14 15
16 17
18 30 31 32 SCLK
CS
B3 SDO
Data from sample N
B15 B14 B2 B1 B0
Reset Program Registers (RST)
±
8500h
SDI X
X X X X X
3 4 5
X X
Sample N
All Program
Registers are reset
to default value on
CS rising edge
CS can go high immediately after RST
command or after reading frame data
ADS8684, ADS8688
SBAS582C – JULY 2014 – REVISED APRIL 2015 www.ti.com
8.4.2.8 Reset Program Registers (RST)
The devices support a hardware and software reset (RST) mode in which all program registers are reset to their
default values. The devices can be put into RST mode using a hardware pin, as explained in the
RST/PD (Input)
section.
The device program registers can be reset to their default values during any data frame by executing a valid
write operation on the command register with a RST command of 8500h, as shown in
Figure 87 . The device
remains in RST mode if no valid conversion command (AUTO_RST or MAN_Ch_n) is executed and SDI remains
low (refer to the
Continued Operation in the Selected Mode (NO_OP) section) during the subsequent data
frames. When the device operates in RST mode, the program register settings can be updated (as explained in
the
Program Register Read/Write Operation section) using 16 SCLK cycles. However, if 32 complete SCLK
cycles are provided, then the device returns invalid data on the SDO line because there is no ongoing conversion
in RST mode. The values of the program register can be read normally during this mode. A valid AUTO_RST or
MAN_CH_n channel selection command must be executed for initiating a conversion on a particular analog
channel using the default program register settings.
Figure 87. Reset Program Registers (RST) Timing Diagram
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