Tews Technologies TMVE8240-11, User Manual

Page: 7 / 70

TVME8240 User Manual Issue 1.2.9 Page 7 of 70
List of Figures
FIGURE 1-1 : BLOCK DIAGRAM TVME8240 FRONT I/O ..............................................................................10
FIGURE 1-2 : BLOCK DIAGRAM TVM8240 BOARD LAYOUT FRONT I/O ...................................................10
FIGURE 10-1 : BOARD I/O OVERVIEW..........................................................................................................55
List of Tables
TABLE 1-1 : FEATURES TVME8240.................................................................................................................9
TABLE 2-1 : PCI ARBITER ASSIGNMENT .....................................................................................................13
TABLE 2-2 : PCI IDSEL ASSIGNMENT...........................................................................................................13
TABLE 2-3 : EPIC SERIAL INTERRUPT ASSIGNMENT ................................................................................15
TABLE 2-4 : STATUS INDICATORS ...............................................................................................................16
TABLE 3-1 : ADDRESS MAP – PROCESSOR VIEW .....................................................................................17
TABLE 3-2 : SUPPORTED TRANSFER SIZES...............................................................................................17
TABLE 3-3 : PCI ADDRESS TRANSLATION ..................................................................................................18
TABLE 3-4 : ADDRESS MAP – PCI MEMORY MASTER VIEW .....................................................................18
TABLE 3-5 : ADDRESS MAP – PCI I/O MASTER VIEW ................................................................................19
TABLE 3-6 : ADDRESS MAP – PERIPHERAL DEVICES DETAIL .................................................................19
TABLE 3-7 : ADDRESS MAP – UTILITY REGISTER DETAIL ........................................................................20
TABLE 3-8 : CONTROL REGISTER................................................................................................................20
TABLE 3-9 : STATUS REGISTER ...................................................................................................................21
TABLE 3-10: LED REGISTER .........................................................................................................................22
TABLE 4-1 : MPC8240 CONFIGURATION REGISTER SETTINGS ...............................................................25
TABLE 4-2 : I2C EEPROM CONTENT ............................................................................................................28
TABLE 5-1 : BOOT FLASH COMMAND CYCLES ..........................................................................................29
TABLE 5-2 : BOOT FLASH AUTO SELECT CODES ......................................................................................30
TABLE 5-3 : BOOT FLASH SECTOR MAP .....................................................................................................30
TABLE 5-4 : MEMORY FLASH COMMAND CYCLES ....................................................................................32
TABLE 5-5 : MEMORY FLASH AUTO SELECT CODES ................................................................................33
TABLE 5-6 : MEMORY FLASH SECTOR MAP ...............................................................................................33
TABLE 6-1 : UNIVERSE-II PCI HEADER ........................................................................................................34
TABLE 7-1 : 21143 PCI HEADER....................................................................................................................36
TABLE 7-2 : 21143 CONFIGURATION EEPROM SETTINGS........................................................................38
TABLE 7-3 : 21143 CONFIGURATION EEPROM CONTENT ........................................................................39
TABLE 9-1 : PCI9030 PCI HEADER................................................................................................................41
TABLE 9-2 : PCI9030 LOCAL CONFIGURATION REGISTER .......................................................................42
TABLE 9-3 : PCI9030 CONFIGURATION EEPROM SETTINGS....................................................................44
TABLE 9-4 : PCI9030 CONFIGURATION EEPROM CONTENT ....................................................................45
TABLE 9-5 : PCI9030 LOCAL SPACE ASSIGNMENT....................................................................................46
TABLE 9-6 : LOCAL SPACE 0 ADDRESS MAP (IP INTERFACE REGISTER)..............................................46