TR5-F40W
User
Manual
42
June 20, 2018
Chapter 3
System Builder
This chapter describes how users can create a custom design project on the FPGA board by using
the Software Tools – System Builder.
3
3
.
.
1
1
I
I
n
n
t
t
r
r
o
o
d
d
u
u
c
c
t
t
i
i
o
o
n
n
The System Builder is a Windows based software utility, designed to assist users to create a Quartus
II project for the FPGA board within minutes. The generated Quartus II project files include:
Quartus II Project File (.qpf)
Quartus II Setting File (.qsf)
Top-Level Design File (.v)
External PLL Controller (.v)
Synopsis Design Constraints file (.sdc)
Pin Assignment Document (.htm)
The System Builder not only can generate the files above, but can also provide error-checking rules
to handle situation that are prone to errors. The common mistakes that users encounter are the
following:
Board damaged for wrong pin/bank voltage assignment.
Board malfunction caused by wrong device connections or missing pin counts for connected
ends.
Performance dropped because of improper pin assignments