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26-3
Tandberg SLR Product Line SCSI Functional Specifications
26.3. Predefined Selftest Sequence 1
Selftest sequence 1 does not affect media (other than
writing out buffered data remaining in the Drive’s data
buffer when the test is started). The following tests
are performed:
FLASH Memory Check. This is a test of the Flash PROM
integrity calculating a simple 32-bit sum of the
whole Flash area.
SRAM Test. Complete Address test of the whole SRAM
Area.
EEPROM Recognize Test. Read Test of known values.
Write/Read test of dedicated Test Cells.
Data Path Controller (DPC) Test. The followings
modules will be tested:
1)
Register Test.
2)
Test of the DPC 8 Bit and 16 bits RAM's.
3)
Memory (DRAM) Access Channels module (MAC).
4)
Error Correction Channel module (ECC ).
5)
Physical Data Formatter module (PDF).
6)
Test the of Arbitration between all data channels
accessing the data buffer
7)
Interrupt Logic test.
DRAM Test. The DRAM is tested using the DPC Fill &
Verify module.
Data Compression Controller Test.
1)
Register test.
2)
Compression/Decompression test with different
data patterns.
Servo Control Test. Calibration test. DSP self-test.
Address-test of the DSP RAM. Synthetic test of the
Voice Coil Driver and feedback loop.
Analog Data Path (ADP) Test.
1)
Recognize test of all ASIC’s involved.
2)
If a cartridge is not inserted; complete
read/write data path loop-back test without
preamplifier.
Micro Controller Test.
