Supero X9DRL-7F, User Manual

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Chapter 2: Installation
2-31
JCOM2
JSD1
P1-DIMMD1
P2-DIMME1
P1-DIMMB1
P2-DIMMH1 P2-DIMMG1
P1-DIMMC1
P2-DIMMF1
COM1
JPW4
JTPM1
LAN2 LAN1
JPW1
JPW2
USB4
JPI2C1
JIPMB1
FAN5
FAN2
FAN3
FAN4
FANA
JPL1 JPL2
JVRM_I2C1 JVRM_I2C2
JPG1
JPS1
JWD1
JLED1
JMLED1
LEDS1
LEDM1
LED1C
LED2
JF1
T-SGPIO1
T-SGPIO2
6-SGPIO2
I-S
AT
A1
I-SATA0
L-SAS0
Battery
JL1
JPS2 JPS3
JOH1 JI2C1 JI2C2
SP1
JUIDB1
USB0/1
X9DRL-7F/EF
Rev.1.01
PCH SLOT3 PCI-E 2.0 X4 (IN X8)
CPU1 SLOT6 PCI-E 3.0 X8
CPU1
VGA
USB8/9
USB6/7
IPMI_LAN
CPU2
JPB1
6-SGPIO1
PCH SLOT2 PCI-E 2.0 X1
CPU1 SLOT4 PCI-E 3.0 X8
I-SATA2
I-SATA3
I-SATA4
P1-DIMMA1
FP CTRL
Intel PCH
LSI 2208
CTRL
BMC
JBT1
LAN
CTRL
LAN
CTRL
L-SAS7
I-SATA5
L-SAS6
L-SAS5
L-SAS4
JPME1
JBR1
BIOS
JSTBY1
L-SAS1
L-SAS2
L-SAS3
JPME2
FAN1
A
A.
JPI
2
C1
B. JIPMB1
Power SMB (I
2
C) Connector
Power System Management Bus (I
2
C)
Connector (JPI
2
C1) monitors power
supply, fan and system temperatures.
See the table on the right for pin
definitions.
PWR SMB
Pin Definitions
Pin# Definition
1 Clock
2 Data
3 PMBUS_Alert
4 Ground
5 +3.3V
IPMB
A System Management Bus header
for IPMI 2.0 is located at JIPMB1.
Connect the appropriate cable here
to use the IPMB I
2
C connection on
your system.
IPMB Header
Pin Definitions
Pin# Definition
1 Data
2 Ground
3 Clock
4 No Connection
B