Supero X9DRL-7F, User Manual

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X9DRL-7F/X9DRL-EF Motherboard User’s Manual
Power Button
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
1
NIC1 Link LED
Reset Button
2
Power Fail LED
HDD LED
FP PWRLED
Reset
PWR
3.3 V
ID_UID_SW/3/3V Stby
Red+ (Blue LED Cathode)
Ground
Ground
19 20
3.3V
X
Ground
NMI
X
NIC2 Link LED
NIC2 Activity LED
NIC1 Activity LED
B
NIC1/NIC2 LED Indicators
The NIC (Network Interface Control-
ler) LED connection for GLAN port 1 is
located on pins 11 and 12 of JF1, and
the LED connection for GLAN Port 2 is
on Pins 9 and 10. Attach the NIC LED
cables here to display network activity.
Refer to the table on the right for pin
definitions.
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach a
cable here to indicate HDD activ-
ity. See the table on the right for pin
definitions.
HDD LED
Pin Definitions (JF1)
Pin# Definition
13 3.3V Standby
14 HD Active
C
A. HDD LED
B. NIC1 LED
C. NIC2 LED
A
GLAN1/2 LED
Pin Definitions (JF1)
Pin# Definition
9 Vcc
10 NIC 2 LED
11 Vcc
12 NIC 1 LED
JCOM2
JSD1
P1-DIMMD1
P2-DIMME1
P1-DIMMB1
P2-DIMMH1 P2-DIMMG1
P1-DIMMC1
P2-DIMMF1
COM1
JPW4
JTPM1
LAN2 LAN1
JPW1
JPW2
USB4
JPI2C1
JIPMB1
FAN5
FAN2
FAN3
FAN4
FANA
JPL1 JPL2
JVRM_I2C1 JVRM_I2C2
JPG1
JPS1
JWD1
JLED1
JMLED1
LEDS1
LEDM1
LED1C
LED2
JF1
T-SGPIO1
T-SGPIO2
6-SGPIO2
I-S
AT
A1
I-SATA0
L-SAS0
Battery
JL1
JPS2 JPS3
JOH1 JI2C1 JI2C2
SP1
JUIDB1
USB0/1
X9DRL-7F/EF
Rev.1.01
PCH SLOT3 PCI-E 2.0 X4 (IN X8)
CPU1 SLOT6 PCI-E 3.0 X8
CPU1
VGA
USB8/9 USB6/7
IPMI_LAN
CPU2
JPB1
6-SGPIO1
PCH SLOT2 PCI-E 2.0 X1
CPU1 SLOT4 PCI-E 3.0 X8
I-SATA2
I-SATA3
I-SATA4
P1-DIMMA1
FP CTRL
Intel PCH
LSI 2208
CTRL
BMC
JBT1
LAN
CTRL
LAN
CTRL
L-SAS7
I-SATA5
L-SAS6
L-SAS5
L-SAS4
JPME1
JBR1
BIOS
JSTBY1
L-SAS1
L-SAS2
L-SAS3
JPME2
FAN1