Supero SUPER P3TSSA, User Manual

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Chapter 1: Introduction
1-15
1-2 Chipset Overview
Intel’s 815E B-Step chipset is made up of three main components: the
Graphics and Memory Controller Hub (GMCH), the I/O Controller Hub (ICH)
and the Firmware Hub (FWH). The GMCH integrates a 133/100/66 MHz
system bus controller, a 2D/3D graphics accelerator (AGP2x/4x) discrete
graphics card, a 133/100 MHz SDRAM controller and a high-speed hub
architecture interface that communicates with the ICH2. The ICH2 inte-
grates a UDMA/100 controller, USB controllers and other I/O functions (see
below). The FWH stores both system and video BIOS and includes a Ran-
dom Number Generator (RNG).
Graphics and Memory Controller Hub (GMCH)
The GMCH includes the host (CPU) interface, DRAM interface, ICH2 inter-
face and 4xAGP interface for the 815/815E chipset. It contains advanced
power management logic and supports dual channels for DRAM. The AGP
2.0 interface supports 4x data transfers and operates at a peak bandwidth
of 266 MB/sec. The MCH host interface bus runs at 133/100/66 MHz.
I/O Controller Hub (ICH2)
The P3TSSA/P3TSSR/P3TSSE is based on the 815E B-Step chipset and has
the more powerful ICH2, which includes UDMA/100 IDE controllers and two
USB controllers that offer 24 Mbps of bandwidth across four USB ports.
ICH2 also features an enhanced AC'97 interface that supports full surround
sound for the Dolby Digital Audio used on DVDs.
Firmware Hub (FWH)
The FWH is a component that brings added security and manageability to
the PC platform infrastructure. This device includes an integrated Random
Number Generator (RNG) for stronger encryption, digital signing and secu-
rity protocols. The FWH stores both the system BIOS and video BIOS
thereby eliminating a redundant nonvolatile memory component.
Recovery from AC Power Loss
BIOS provides a setting for you to determine how the system will respond
when AC power is lost and then restored to the system. You can choose
for the system to remain powered off (in which case you must hit the