B-9
Appendix B: AMIBIOS POST Codes
B-4
Bus Checkpoint Codes
The system BIOS passes control to different buses at the following checkpoints:
Checkpoint
Code Description
2Ah
Initializing the different bus system, static, and output devices, if
present.
38h
Initialized bus input, IPL, and general devices, if present.
39h
Displaying bus initialization error messages, if any.
95h
Initializing bus adaptor ROMs from C8000h through D8000h.
Additional Bus Checkpoints
While control is inside the different bus routines, additional checkpoints are output to
I/O port address 0080h as word to identify the routines being executed. These are
word checkpoints.
The low byte of checkpoint is the system BIOS checkpoint where control is passed
to the different bus routines.
The high byte of checkpoint indicates that the routine is being executed in different
buses.
High Byte
The high byte of these checkpoints includes the following information:
Bits
Description
Bits 7-4
0000 Function 0.
Disable all devices on the bus.
0001 Function 1.
Initialize static devices on the bus.
0010 Function 2.
Initialize output devices on the bus.
0011 Function 3.
Initialize input devices on the bus.
0100 Function 4.
Initialize IPL devices on the bus.
0101 Function 5.
Initiate general devices on the bus.
0110 Function 6.
Initialize error reporting on the bus.
0111 Function 7.
Initialize add-on ROMs for all buses.
Bits 3-0
Specify the bus
0
Generic DIMM Device Initialization Manager.
1
Onboard System devices.
2
ISA devices.
3
EISA devices.
4
ISA PnP devices.
5
PCI devices.
Summary of Contents for SUPER P3TSSA
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