STC12C5Axx
Technical Summary
21
Timer/Counter
STC12C5Axx has two 16-bit timers, and they are named
T0
and
T1
. Each of them can also
be used as a general event counter, which counts the transition from 1 to 0.
Since the STC12C5Axx is a RISC-like MCU which execute faster than traditional 80C51 MCU
from other providers. Based on consideration of compatibility with traditional 80C51 MCUs,
the frequency of the clock source for
T0
and
T1
is designed to be selectable between
oscillator frequency divided-by-12 (default) or oscillator frequency.
The user can configure T0/T1 to work under mode-0, mode-1, mode-2 and mode-3. It is fully
the same to a traditional 80C51 MCU.
There are two SFR designed to configure timers
T0
and
T1
. They are
TMOD
,
TCON
.
The user also should take a glace of SFR
AUXR
which decide the frequency of the clock
source driving the
T0
and
T1
.
SFR:
TMOD
(Timer Mode Control Register)
Read/Write
Address:
0X89H
Default: 0000-0000
Bit
7
6
5
4
3
2
1
0
For Timer-1 Only
For Timer-0 Only
Name
GATE
C//T
M1 M0
GATE
C//T
M1 M0
GATE: =
Gating control
0: =
(default)
Timer
x
is enabled whenever “TR
x
” control bit is set.
1: =
Timer/Counter
x
is enabled only while “/INT
x
” pin is high and
“
TR
x
” control bit is set.
C//T: =
Timer or Counter function selector.
0
: =timer,
1
: =counter
0: =
(default)
Configure
Tx
as Timer use
1: =
Configure
Tx
as Counter use
{M1, M0}:
mode select
{0, 0}
: =
Configure
Tx
as 13-bit timer/counter
{0, 1}:
=
Configure
Tx
as 16-bit timer/counter
{1, 0}
: =
Configure
Tx
as 8-bit timer/counter with automatic reload capability
{1, 1}
: =
for
T0,
set
TL0
as 8-bit timer/counter,
TH0
is locked into 8-bit timer
for
T1,
set
Timer/Counter1 Stopped
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datasheet pdf - http://www.DataSheet4U.net/
