STC12C5Axx
Technical Summary
63
Analog to Digital Converter
The ADC on STC12C5Axx an 10-bit resolution, successive-approximation approach, medium-speed
A/D converter. V
REFP
/ V
REFM
is the positive/negative reference voltage input for internal voltage-scaling
DAC use, the typical sink current on it is 600uA ~ 1mA. For STC12C5A, these two references are
internally tied to VDD and GND, separately.
Conversion is invoked since ADC_START bit is set. Prior to ADC conversion, the desired I/O ports for
analog inputs should be configured as input-only or open-drain mode first. The conversion takes around
a fourth cycles to sample analog input data and other three fourths cycles in successive-approximation
steps. Total conversion time is controlled by two register bits –
SPEED1
and
SPEED0
. Analog input
source comes from P1.
x
, one of the eight-channels is multiplexed by analog multiplexer into the
comparator. When conversion is completed, the result will be saved onto {
ADC_RES[7:0],
ADC_RESL[1:0]
} register. After the result has been loaded onto {
ADC_RES[7:0], ADC_RESL[1:0]
}
register,
ADC_FLAG
will be set.
ADC_FLAG
associated with its enable register
IE.5
(
EADC
).
ADC_FLAG
should be cleared in software. The ADC interrupt service routine vectors to 2B
H
. When the
chip enters idle mode or power-down mode, the power of ADC is turned off by hardware.
P1.7(AIN7)
P1.6(AIN6)
P1.5(AIN5)
P1.4(AIN4)
P1.3(AIN3)
P1.2(AIN2)
P1.1(AIN1)
P1.0(AIN0)
+
-
10-bit DAC
Successive
Approximation
Regiter
10
CHS2 CHS1 CHS0
SPEED1
SPEE
D0
ADC_
FLAG
ADC_
START
ADC_POWE
R
Comparator
B9
B8
B7
B6
B5
B4
B3
B2
ADC_RES
ADC_CONTR
B1
B0
-
-
-
-
ADC_RESL
-
-
Vin – V
REFM
V
REFP
- V
REFM
{ADC_RES,ADC_RESL[1:0]
=
http://www.DataSheet4U.net/
datasheet pdf - http://www.DataSheet4U.net/
