Stanford Research Systems DS335, User Manual

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Circuitry 5-7
DS335 Synthesized Function Generator
Power Supplies (DS335PS9)
A transformer with multiple primary taps accommodates operation from 100, 120, 220 and 240 Vac mains.
The secondaries are full-wave rectified, filtered, and regulated.
Linear power supplies which float with the ground applied to the BNC shields p-15 , +5 and -5.2 Vdc.
There are three separate regulators for the +5 supplies so as to reduce noise in critical circuits: +5_LOGIC,
+5_CLOCK, and +5_ANALOG.
There is a 9.4 Vac tap on the secondary of the transformer which is rectified, filtered, and regulated on the
optional communications interface to provide a +5 Vdc which is referenced to the line cord ground. (See sheet
DS340PS10).
A power-up/power-down reset circuit asserts RESET signals to the system whenever the unit is turned on or
off. Clean resets are important for starting the CPU and for RAM protection on power-down.
Communications Interface (DS335PS10-Optional)
The design of the communications interface is dictated by the requirement that it must be ground referenced,
while the rest of the system must float with the BNC shield. This requires a separate power supply, and opto-
isolators for data and clock.
To avoid using large numbers of opto-isolators, it is necessary to transfer data and commands between the
CPU and the communications interface serially.
The RS232 interface is handled by a 8251 UART, the GPIB interface uses a TMS9914A GPIB controller. Both
of these devices have a bi-directional data bus and several internal registers for data and control.
To write to a register in one of these devices, sixteen bits must be shifted serially. (Eight bits of data, and
eight 'command' bits.) This requires sixteen OUT instructions, and sixteen shift instructions. (Only the MSB of
the OUT will be transferred to the communications interface with each OUT instruction.)
Consider a write to a register in the UART to illustrate the operation of the communications interface. First, the
eight data bits will be sent, with the MSB going first. Next the command byte, 10h, will be sent (MSB first).
Both bytes will be clocked serially through the to shift registers, U1000 and U1002, with the data byte ending
up in U1002 and the command byte in U1000. The command byte, 10h, indicates that this will be a WRITE to
the RS232 register 0. Finally, a single OUT instruction will assert -CMD_STB (the command strobe),
generating a -CS and -WR to the UART, writing the data byte to register 0.
To read a register, only the command byte and command strobe need be sent. For example, if the command
byte 49h is shifted into the command shift register (U1000), and the command strobe asserted, then register
01 in the GPIB controller will be read into the shift register (U1002). The contents of the data shift register
may then be clocked down to the CPU with eight IN and eight shift instructions.