Trigger modes and appendant registers
Trigger masks
(c) Spectrum GmbH
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The table below is showing the registers for the channel OR mask and the possible constants that can be written to it.
The following example shows, how to setup the OR mask for channel trigger. As an example a simple edge detection has been chosen. The
explanation and a detailed description of the different trigger modes for the external TTL trigger inputs will be shown in the dedicated passage
within this chapter.
Trigger AND mask
The purpose of this passage is to explain the trigger AND mask (see
left figure) and all the appendant software registers in detail.
The AND mask shown in the overview before as one object, is sepa-
rated into two parts: a general AND mask for external trigger and
software trigger and a channel AND mask.
Every trigger source of the M3i series cards except the software trigger is
wired to one of the above mentioned AND masks. The user then can program
which trigger source will be recognized, and which one won’t.
This selection for the general mask is realized with the SPC_TRIG_ANDMASK
register in combination with constants for every possible trigger source.
This selection for the channel mask is realized with the
SPC_TRIG_CH_ANDMASK0 register in combination with constants for every
possible channel trigger source. In either case the sources are coded as a bit-
field, so that they can be combined by one access to the driver with the help
of a bitwise OR.
The table below shows the relating register for the general AND mask and the
possible constants that can be written to it.
The following example shows, how to setup the AND mask, for an external trigger. As an example a simple high level detection has been
Register
Value
Direction
Description
SPC_TRIG_CH_AVAILORMASK0
40450
read
Bitmask, in which all bits of the below mentioned sources/channels (0…31) for the channel OR mask
are set, if available.
SPC_TRIG_CH_ORMASK0
40460
read/write
Includes the analog or digital channels (0…31) within the channel trigger OR mask of the card.
SPC_TMASK0_CH0
00000001h
Enables channel0 for recognition within the channel OR mask.
SPC_TMASK0_CH1
00000002h
Enables channel1 for recognition within the channel OR mask.
SPC_TMASK0_CH2
00000004h
Enables channel2 for recognition within the channel OR mask.
SPC_TMASK0_CH3
00000008h
Enables channel3 for recognition within the channel OR mask.
…
…
…
SPC_TMASK0_CH28
10000000h
Enables channel28 for recognition within the channel OR mask.
SPC_TMASK0_CH29
20000000h
Enables channel29 for recognition within the channel OR mask.
SPC_TMASK0_CH30
40000000h
Enables channel30 for recognition within the channel OR mask.
SPC_TMASK0_CH31
80000000h
Enables channel31 for recognition within the channel OR mask.
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_CH_ORMASK0, SPC_TMASK_CH0); // Enable channel0 trigger within the OR mask
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_CH0_LEVEL0, 0); // Trigger level is zero crossing
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_EXT0_MODE, SPC_TM_POS); // Setting up external trigger for rising edges
Register
Value
Direction
Description
SPC_TRIG_AVAILANDMASK
40420
read
Bitmask, in which all bits of the below mentioned sources for the AND mask are set, if available.
SPC_TRIG_ANDMASK
40430
read/write
Defines the events included within the trigger AND mask of the card.
SPC_TMASK_NONE
0
No trigger source selected
SPC_TMASK_EXT0
2h
Enables the external (analog) trigger 0 for the AND mask. The card will trigger when the programmed condition for
this input is valid.
SPC_TMASK_EXT1
4h
Enables the external (TTL) trigger 1 for the AND mask. Please note that the mode of the multi purpose connector X0
must be programmed to trigger input if using the Ext1 trigger (SPCM_X0_MODE=SPCM_XMODE_TRIGIN). The card
will trigger when the programmed condition for this input is valid.
SPC_TMASK_EXT2
8h
Enables the external (TTL) trigger 1 for the AND mask. Please note that the mode of the multi purpose connector X1
must be programmed to trigger input if using the Ext2 trigger (SPCM_X1_MODE=SPCM_XMODE_TRIGIN). The card
will trigger when the programmed condition for this input is valid.
