Spectrum M3i.4830, Hardware Manual

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Acquisition modes Data organisation
(c) Spectrum GmbH 79
Data organisation
Data is organized in a multiplexed way in the transfer buffer. If using 2 channels data of first activated channel comes first, then data of
second channel.
The samples are re-named for better readability. A0 is sample 0 of channel 0, B4 is sample 4 of channel 1, and so on
Sample format
The 16 bit A/D samples are stored in twos complement in the 16 bit data word. 16bit resolution means that data is ranging from -
32768…to…-32767.
Converting ADC samples to voltage values
The Spectrum driver also contains a register that holds the value of the decimal value of the full scale representation of the installed ADC. This
value should be used when converting ADC values (in LSB) into real-world voltage values, because this register also automatically takes any
specialities into account, such as slightly reduced ADC resolution with reserved codes for gain/offset compensation.
In case of a board that uses an 8 bit ADC that provides the full ADC code (with-
out reserving any bits) the returned value would be 128. The the peak value for
a ±1.0 V input range would be 1.0 V (or 1000 mv).
A returned sample value of for e49 (decimal, two’s complement,
signed representation) would then convert to:
A returned sample value of for example -55 (decimal) would then convert to:
When converting samples that contain any additional data such as for example additional digital channels
or overrange bits, the extra information must be masked out and a proper sign-extension must be per-
formed, before these values can be used as a signed two’s complement value for above formulars.
Activated Channels Ch0 Ch1 Samples ordering in buffer memory starting with data offset zero
1 channel X A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16
1 channel X B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16
2 channels X X A0 B0 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8
Bit Standard Mode
D15 ADx Bit 15 (MSB)
D14 ADx Bit 14
D13 ADx Bit 13
D12 ADx Bit 12
D11 ADx Bit 11
D10 ADx Bit 10
D9 ADx Bit 9
D8 ADx Bit 8
D7 ADx Bit 7
D6 ADx Bit 6
D5 ADx Bit 5
D4 ADx Bit 4
D3 ADx Bit 3
D2 ADx Bit 2
D1 ADx Bit 1
D0 ADx Bit 0 (LSB)
Register Value Direction Description
SPC_MIINST_MAXADCVALUE 1126 r Contains the decimal code (in LSB) of the ADC full scale value.
V
in
49 1000 mV
128
----------------------------------------------
×
382.81 mV
= =
V
in
55 –
1000 mV
128
----------------------------------------------
×
427.69 mV
= =