Spectrum Digital TMS320DM642, Technical Reference

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Spectrum Digital, Inc
2-13
2.4 I
2
C Interface
The I
2
C bus on the DM642 is ideal for interfacing to the control registers of many
devices. On the DM642 EVM the I
2
C bus is used to configure the video encoder, video
decoders, and stereo Codec. An I
2
C ROM is also interfaced via the serial bus. The
format of the bus is shown in the figure below.
The addresses of the on board peripherals are shown in the table below.
2.5 SPDIF Interface
The McASP pins on the DM642 can be configured to operate as a SPDIF transmitter.
The DM642 EVM supports a single SPDIF output which is routed to RCA jack, J9. The
SPDIF output pin is routed to a driver and filter circuit. When the SPDIF interface is
enabled the TLV320AIC23B codec is disabled.
Table 9: I
2
C Memory Map
Device Address R/W Function
TVP5146 0xBA R/W Capture 1 Decoder
TVP5150A 0xB8 R/W Capture 2 Decoder
SAA7105 0x88 R/W Encoder
TLV320AIC23B 0x1A R/W CODEC
24WC256 0x50 R/W
I
2
C EEPROM
Figure 2-4, I
2
C Bus Format
Start Slave Address W ACK Sub Address ACK-S Data ACK-S Stop
Write Sequence
Start Slave Address W Sub Address ACK-S
Start Slave Address R Data ACK-S STOP
Read Sequence