Sony XDCAM PDW-HD1500, Maintenance Manual

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9-8
PDW-HD1500/V1 (E)
Output side
The output signal of the time code is output from the PHOT (IC801) on the HPR-23 board, and then output from the BNC
connector (the right one of the CN7, twin connector on the NET-4 board) of the TIME CODE OUT via the buffer/amplifier
circuit (IC103, IC104) on the NET-4 board.
USB
The USB data is connected to the USB interface IC (IC1302) from the USB connector (CN600 on the NET-4 board), and
then converted into the parallel data.
After that, the parallel data is connected to the LINUX CPU (IC1) via the PCI bus, and controlled.
6. Optical Drive System
Recording System
Recording data sent from the HPR-23 board through the ATA bus (Ultra ATA66) is sent to the Blu-ray Disc Controller:
BDC (IC300, IC1300) on the DR-601 board.
The BDC performs signal processing to conform to recording format, such as ATA interface, ECC coding and 17PP (Parity
Preserve/Prohibit RMTR) modulation.
The recording data is converted to multi-pulse in the BDC, and the multi-pulse data is sent through the flexible card wire to
the optical block to be written into the disc.
Playback System
Data playback system
The RF signal played back from the disc is sent from the optical block to the Front End Processor: FEP (IC200, IC1200) on
the DR-601 board where equalizing and asymmetry correction are performed after the RF signal passes through the AGC.
After A/D conversion by the read clock played back in the PLL, the signal is sent to the BDC (IC300, IC1300).
In the BDC, the signal passes through the adaptive digital filter, and Viterbi demodulation, 17 demodulation, and ECC
decoding are applied to the signal. Then the signal is sent through the ATA bus to the HPR-23 board as played back data.
Address playback system
Address information played back from the disc is sent from the optical block to the FEP (IC200, IC1200) on the DR-601
board in which the information passes through AGC and BPF and is then binarized. The internal
PLL generates a wobble clock (WCK).
In addition, the address information passes through AGC, HPF and LPF, is A/D converted in the FEP, and is then sent to
the BDC (IC300, IC1300) for address decoding.
Servo System
Tri-axis actuator and SA actuator
The object lens of the optical block is controlled for focus direction, track direction, and tilt angle by the tri axis actuator.
The light reflected from the disc is converted to the electrical signal by the optical block. The electrical signal is input to the
FEP (IC200, IC1200) on the DR-601 board, and the focus error signal and the track error signal are detected. The SV DSP
(IC400, IC1400) outputs the control data based on the errors to the driver (IC501, IC1501) and controls the focus actuator
and the track actuator through the driver.
The tilt actuator is controlled for its angle against the disc to be optimum based on the tilt adjustment result for the jitter of
the playback signal to be minimum and the output of the angular velocity sensor.
The SA actuator position is controlled for the spherical aberration to be optimum at the start-up adjustment when the disc is
inserted. The SA actuator for the double layer disc is controlled to the optimum position every time when jumping the layer.