Sony PDW-U4, Service Manual

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7-1-3. System Control
The CPU in the Disc Drive LSI (IC100, IC200, IC300, IC400) on the BD-48 board performs system
control of the drive section for each channel.
• Channel 0a: IC100
• Channel 0b: IC200
• Channel 1a: IC300
• Channel 1b: IC400
The Disc Drive LSI (IC100) of channel 0a controls the spindle and the loader.
The CPU in the Disc Drive LSI (IC100) of channel 0a controls the seek and the LSI in the optical blocks
on the “0” side, and the CPU in the Disc Drive LSI (IC300) of channel 1a controls the seek and the LSI in
the optical blocks on the “1” side.
The CPU in BRIDGE (IC700) performs system control of the BRIDGE section. It also controls LED
panel display, eject switch, maintenance, and error log.
The Drive firmware is stored separately in the flash memory in the Disc Drive LSI (IC100, IC200, IC300,
IC400) and in the external flash memory (IC101, IC201, IC301, IC401) and are loaded when the unit is
powered on.
The BRIDGE firmware is stored in the flash memory (IC701) and is loaded when the unit is powered on.
Adjustment data and hours meter data are stored in the EEPROM (IC3) on the SE-1004A board.