149
Section 9
Diagrams
Overall
Overall (1/2)
9,10
CN100
HEAD
ASSEMBLY
(XDH-422)
0a,0b-Ch
RF_P/N_0A
1
SVREF_0A
44,46
VWDC_0A,VRDC_0A
24
SEN_0A
2
ANAMON_0A
3,28
WXR_0A
42
OPCTGL_0A
18,19
FPD_P/N_0A
IC107
SYS_EN
AR_BOOT
AR_BOOT
2.5V_OK
AR_BOOT
AR_BOOT
AR_BOOT
LDDEN
EEP_SEL_0A
VCC5V(LD)
27
LDEN_0A
LDP_EN_0A
/-_0A
SL/-_0A,
SL/-_0A,
U/V/W_0A,
MCOM_0A
TRK_DRV_OFS_0A
DRVCTL2_0A
TRK_LPF_0A/0B
LD_POW_CNT_0A
LDDENA
LDP_CTL_0A
SSOMI_0A,SSIMO_0A,
SSCLK_0A,SSSZ_0A
29-31
VCC_LD_0A
S/-_0A,
S/-_0A,
/-_0A,
/-_0A,
/-_0A
SEN_LDD_0A
48-61
41
IC104
32-37
OUTEN2-4_0A,XOUTEN2-4_0A
21,26
SDIO_0A,SCLK_0A
4-7,
12-15
A-H_0A
IC108
IC113
IC103
SWTICHING
REGULATOR
22,23
GS_X/Z_0A
GS_X/Z_0A
GYRO_A,
G_TRK_0
17
45
IC102
SERVO
DRIVER
IC600
ADC
IC109
IC112
AMP
IC601
AMP
IC105
CS_EEPROM_0A
AMP
IC100
DISC DRIVE
LSI
HEAD-0/CH-A
IC700(1/2)
BRIDGE
FPGA
TO
CN1005
DSP_MON3_0A
IC106
WRITE_SUSPEND
VCC5V(A)
25
VCC5V(LD)
43
VCC3.3V(D)
TO/FROM
IC200
FROM
CN1005
TO
Q501
36,37
CN200
RF_P/N_0B
28
SVREF_0B
55,57
VWDC_0B,VRDC_0B
24
SEN_0B
29
ANAMON_0B
21,30
WXR_0B
54
OPCTGL_0B
59,60
FPD_P/N_0B
IC207
SYS_EN
VCC5V(LD)
19
LDEN_0B
LDP_EN_0B
/-_0B
TRK_DRV_OFS_0B
DRVCTL2_0B
TRK_LPF_0A/0B
LD_POW_CNT_0B
LDP_CTL_0B
LDDENA
SSOMI_0B,SSIMO_0B,
SSCLK_0B,SSSZ_0B
15-17
VCC_LD_0B
S/-_0B,
S/-_0B,
/-_0B,
/-_0B,
/-_0B
SEN_LDD_0B
1-14
53
IC204
46-51
OUTEN2-4_0B,XOUTEN2-4_0B
18,22
SDIO_0B,SCLK_0B
31-34,
39-42
A-H_0B
IC208
IC213
IC203
SWTICHING
REGULATOR
58
IC202
SERVO
DRIVER
AMP
IC205
AMP
IC200
DISC DRIVE
LSI
HEAD-0/CH-B
DSP_MON3_0B
IC206
WRITE_SUSPEND
VCC5V(A)
52
VCC5V(LD)
20
VCC3.3V(D)
TO/FROM
IC100
Q101
PI_LED_ON_0A
XFG
XFG
INV.
AD_SDO_0,AD_SDI_0,
AD_SCLK_0,AD_CS_0
FROM
IC196
TO
IC710,
IC704
UART_RX/TX_0A
TXP/N_0A,RXP/N_0A
SERIALCK_0A,SERIALDT_0A
READY,FGPLL
DI_0A,DO_0A,FPGA_CS_0A,CLK_0A
FPGA_INT_0A
UART_RX/TX_0B
TXP/N_0B,RXP/N_0B
SERIALCK_0B,SERIALDT_0B
DI_0B,DO_0B,FPGA_CS_0B,CLK_0B
FPGA_INT_0B
READY,FGPLL
INLIM_0
INLIM_0
IC101
SPI
FLASH
Q100
X100
33.868MHz
INV.
IC201
SPI
FLASH
Q200
X200
33.868MHz
INV.
BV_RESET
BV_RESET
BV_RESET
BV_RESET
BV_RESET
BV_RESET
BV_RESET
BV_RESET
BV_RESET
READY,FGPLL,
WRITE_SUSPEND
TO
IC107,IC108,
IC207,IC208,
IC307,IC308,
IC407,IC408
IC604
SYS_EN
INV.
Q3
INV.
IC1
INV.
9,10
CN300
RF_P/N_1A
1
SVREF_1A
44,46
VWDC_1A,VRDC_1A
24
SEN_1A
2
ANAMON_1A
3,28
WXR_1A
42
OPCTGL_1A
18,19
FPD_P/N_1A
IC307
SYS_EN
LDDEN
EEP_SEL_1A
VCC5V(LD)
27
LDEN_1A
LDP_EN_1A
/-_1A
SL/-_1A,
SL/-_1A
TRK_DRV_OFS_1A
DRVCTL2_1A
TRK_LPF_1A/1B
LD_POW_CNT_1A
LDDENA
LDP_CTL_1A
SSOMI_1A,SSIMO_1A,
SSCLK_1A,SSSZ_1A
29-31
VCC_LD_1A
S/-_1A,
S/-_1A,
/-_1A,
/-_1A,
/-_1A
SEN_LDD_1A
48-61
41
IC304
32-37
OUTEN2-4_1A,XOUTEN2-4_1A
21,26
SDIO_1A,SCLK_1A
4-7,
12-15
A-H_1A
IC308
IC313
IC303
SWTICHING
REGULATOR
22,23
GS_X/Z_1A
GS_X/Z_1A
GYRO_A/B_1
GYRO_A,
G_TRK_1
17
45
IC302
SERVO
DRIVER
IC650
ADC
IC309
IC312
AMP
IC651
AMP
IC305
CS_EEPROM_1A
AMP
IC300
DISC DRIVE
LSI
HEAD-1/CH-A
TO
CN1004
DSP_MON3_1A IC306
WRITE_SUSPEND
VCC5V(A)
25
VCC5V(LD)
43
VCC3.3V(D)
TO/FROM
IC400
FROM
CN1004
TO
Q502
36,37
CN400
RF_P/N_1B
28
SVREF_1B
55,57
VWDC_1B,VRDC_1B
24
SEN_1B
29
ANAMON_1B
21,30
WXR_1B
54
OPCTGL_1B
59,60
FPD_P/N_1B
IC407
SYS_EN
VCC5V(LD)
19
LDEN_1B
LDP_EN_1B
/-_1B
TRK_DRV_OFS_1B
DRVCTL2_1B
TRK_LPF_1A/1B
LD_POW_CNT_1B
LDP_CTL_1B
LDDENA
SSOMI_1B,SSIMO_1B,
SSCLK_1B,SSSZ_1B
15-17
VCC_LD_1B
S/-_1B,
S/-_1B,
/-_1B,
/-_1B,
/-_1B
SEN_LDD_1B
1-14
53
IC404
46-51
OUTEN2-4_1B,XOUTEN2-4_1B
18,22
SDIO_1B,SCLK_1B
31-34,
39-42
A-H_1B
IC408
IC413
IC403
SWTICHING
REGULATOR
58
IC402
SERVO
DRIVER
AMP
IC405
AMP
IC400
DISC DRIVE
LSI
HEAD-1/CH-B
DSP_MON3_1B IC406
WRITE_SUSPEND
VCC5V(A)
52
VCC5V(LD)
20
VCC3.3V(D)
TO/FROM
IC300
Q301
PI_LED_ON_1A
INV.
AD_SDO_1,AD_SDI_1,
AD_SCLK_1,AD_CS_1
FROM
IC602
FROM
CN700
IMON_PD,
IMON_ACA
UART_RX/TX_1A
TXP/N_1A,RXP/N_1A
SERIALCK_1A,SERIALDT_1A
READY,FGPLL
DI_1A,DO_1A,FPGA_CS_1A,CLK_1A
FPGA_INT_1A
UART_RX/TX_1B
TXP/N_1B,RXP/N_1B
SERIALCK_1B,SERIALDT_1B
DI_1B,DO_1B,FPGA_CS_1B,CLK_1B
FPGA_INT_1B
READY,FGPLL
INLIM_1
INLIM_1
IC301
SPI
FLASH
Q300
X300
33.868MHz
INV.
IC401
SPI
FLASH
Q400
X400
33.868MHz
INV.
S3
BOOT
RECOVERY
RECOVERY
RECOVERY
Q2
INV.
S2
RECOVERY
CORE_DRIVE_RESET
2.5V_OK_BUF
IC2
S1
RESET
BD-48(1/2)
HEAD
ASSEMBLY
(XDH-422)
1a,1b-Ch
Summary of Contents for PDW-U4
Page 7: ...4 Frame Wiring 151 Revision History 152 ...
Page 24: ...21 Hold the shaded portions Keep away a screwdriver Objective lens Actuator ...
Page 155: ...152 Revision History Date History Contents 2020 10 1st Edition 9 932 764 01 ...
Page 156: ...PDW U4 SY PDW U4 CN J E 9 932 764 01 Sony Corporation Printed in Japan 2020 10 08 2020 ...