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— 121 —
Pin No.
43
44
45
46
47
48
49
50
51
52
53 to 55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76 to 83
84 to 91
92 to 98
99
100
I/O
O
I
O
I
I
O
I
I
—
I
I
I
I
I
I
I
—
O
O
I
I
—
O
I
—
O
O
I
I/O
O
O
O
I/O
O
O
—
Description
Reset signal input. “L”: reset. The low voltage detection signal is used as reset signal
I2C bus busy input
Not used in this set (close)
Subcode sync (S0+S1) detection signal input from CXD2587Q (IC101) of the CD section
Not used in this set (close)
AC cut-off signal output. “L”: AC OFF
JOG dial pulse input. Not used in this set (fixed at “L”)
JOG dial pulse input. Not used in this set (fixed at “L”)
Power supply terminal (+5 V) (for A/D converter section, analog system)
Reference voltage (+5 V) input. (for A/D converter)
KEY input terminal. Not used in this set (fixed at “H”)
Japanese Kana letters input function enable/disable setting input. “H”: Japanese Kana letters disabled,
“L”: Japanese Kana letters enabled (fixed at “L” in this set)
Input signal setting to enable composite model of CD section with other sections (amplifier, tuner, etc.).
“H”: Composite mode. “L”: separate model (fixed at “H” in this set)
FOCUS/NO DISC is selected at GFS NG during search
Input signal from the disc sensor (Q703) of the CD mechanism. “H”: disc is present
Input signal from the detection switch (S706 (COUNT)) of the CD mechanism deck.
“L”: When elevator arrives at each sub-try storing position
Ground terminal (for A/D converter)
Not used (fixed at “L”)
Not used in this set (open)
Reference voltage (+5 V) input terminal (for A/D converter)
Not used in this set (open)
Subcode Q data input from CXD2587Q (IC101) of the CD section
Not used in this set (open)
Subcode Q data transfer clock signal output to CXD2587Q (IC 101) of the CD section
Laser power control signal output
Not used in this set (open)
I2C bus data input/output
Internal status monitor input from CXA2587Q (IC101) of the CD section
I2C bus clock signal output
Address output to static RAM (IC302)
Bi-directional data bus to static RAM (IC302)
Address output to static RAM (IC302)
Address output to external device. Not used in this set (open)
Ground terminal
Pin Name
RESET
12CBSY
—
SCOR
—
AC CUT
JOG0
JOG1
AVDD
ACREF0
KEY0 to KEY2
SELECT0
SELECT1
SELECT2
DISK SENS
CNT SW
AVSS
MECHA JIG
CHECK
AVREF1
—
—
—
SUBQ
—
SQCLK
LPH
—
12CDAT
SENSE
12C
A0 to A7
D0 to D7
A8 to A14
A15
VSS
Summary of Contents for HCD-MD555
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Page 74: ...HCD MD555 95 96 7 20 SCHEMATIC DIAGRAM PANEL SECTION Refer to page 110 for IC Block Diagrams ...
Page 122: ... 148 MEMO HCD MD555 ...