Sony BVP-900 Series, Maintenance Manual

Page: 156 / 520

2-30
BVP-900
BVP-900P
IC
UPD6466GS-515 (NEC)FLAT PACKAGE
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CLK
IN
CS
IN
DATA
IN
PCL
IN
CMDCT
IN
OSC
OUT
OSC
IN
TEST
V
DD
HSYNC
IN
VSYNC
IN
VB
OUT
VG
OUT
VR
OUT
VBLK (BBLK)
OUT
VC2 (GBLK)
OUT
BLK2 (RBLK)
OUT
VC1
OUT
BLK1
OUT
GND
INPUT
CLK
CS
CMDCT
DATA
HSYNC
OSC
PCL
VSYNC
OUTPUT
BLK1, BLK2
BBLK
OSC
GBLK
RBLK
VBLK
VC1, VC2
VR, VG, VB
OTHER
TEST
: CLOCK
: CHIP SELECT
: COMMAND SELECT
: SERIAL DATA
: HORIZONTAL SYNC
: OSCILLATOR
: POWER ON CLEAR
: VERTICAL SYNC
: BLANKING 1, 2
: BLANKING B
: OSCILLATOR
: BLANKING G
: BLANKING R
: BLANKING
: CHARACTER 1, 2
: CHARACTER R, G, B
: TEST
*
IN ( ) ARE SET BY SETTING WITH INITIAL CONDITION SETTING COMMAND.
C-MOS ON-SCREEN CHARACTER DISPLAY
—TOP VIEW—
CXD8892Q (SONY)
34
35
36
37
38
39
40
41
42
43
44
NC
GND
22
21
20
19
18
17
16
15
14
13
12
V
DD
33 32 31 30 29 28 27 26 25 24 23
NC
1 2 3 4 5 6 7 8 9
10 11
NC NC NC NC NC NC
C-MOS PARALLEL TO SERIAL CONVERTER
—TOP VIEW—
1
2
3
4
5
6
7
8
9
10
11
I
I
I
O
I
O
—
O
O
O
O
CS
IOW
RD
CK
SCKI
SCKO
NC
TOUT0
TOUT1
TOUT2
TOUT3
12
13
14
15
16
17
18
19
20
21
22
O
O
O
O
O
—
O
O
O
O
—
SOCK
SDA0
LD0
SDA1
LD1
GND
SDA2
LD2
SDA3
LD3
NC
23
24
25
26
27
28
29
30
31
32
33
—
—
—
—
—
I
I
—
I/O
I/O
I/O
NC
NC
NC
NC
NC
TIN
TE
NC
D7
D6
D5
34
35
36
37
38
39
40
41
42
43
44
I/O
I/O
I/O
I/O
I/O
—
I
I
I
I
I
D4
D3
D2
D1
D0
V
DD
RST
A3
A2
A1
A0
PIN
NO.
I/O SIGNAL
PIN
NO.
I/O SIGNAL
PIN
NO.
I/O SIGNAL
PIN
NO.
I/O SIGNAL
INPUT
A0 - A3
CS
IOW
RD
RST
SCKI
TE
TIN
OUTPUT
CK
LD0 - LD3
SCKO
SDA0 - SDA3
SOCK
TOUT0 - TOUT3
INPUT/OUTPUT
D0 - D7
: ADDRESS
: CHIP SELECT
: I/O WRITE
: I/O READ
: RESET
: SERIAL CLOCK
: TEST ENABLE
: TEST
: CLOCK
: LOAD PULSE
: SERIAL CLOCK
: SERIAL DATA
: SERIAL OUTPUT CLOCK
: TEST
: DATA
DATA INPUT
SHIFT
REGISTER
INSTRUCTION
DECODER
CHARACTER
SIZE
REGISTER
HORIZONTAL
ADDRESS
REGISTER
WRITE
ADDRESS
COUNTER
HORIZONTAL
SIZE
COUNTER
HORIZONTAL
POSITION
COUNTER
HORIZONTAL
ADDRESS
COUNTER
VERTICAL
ADDRESS
REGISTER
VERTICAL
SIZE
COUNTER
VERTICAL
POSITION
COUNTER VERTICAL
ADDRESS
COUNTER
SYNC
PROTECTION
CIRCUIT
OSC
CIRCUIT
DISPLAY
CONT.
REGISTER
DATA
SELECTOR
CHARA-
CTER
DATA
9-BIT
x
288 WORD
VIDEO RAM
BACK-
GROUND
CONT.
DATA
REGISTER
CHARACTER
GENERATOR
ROM
12 x 18-BIT
x
512 WORD
OUTPUT CONTROLLER
16
VR
17
VG
18
VB
15
*
(BBLK) VBLK
12
VC1
11
BLK1
14
*
(GBLK) VC2
13
*
(RBLK) BLK2
CONTROL SIGNAL
DATA
3
CLK
1
CS
2
CMDCT
6
OSC
8
OSC
7
HSYNC
20
VSYNC
19
TEST
9
PCL
4
COLOR
DATA
3-BIT
x
288 WORD
PRINTER
DATA
1-BIT
x
288 WORD
INVERT
DATA
1-BIT
x
288 WORD
OUTPUT
SETTING
DATA
1-BIT
x
288 WORD