SN8P275X Series
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD
Page 75
Version 0.7
6.12 MULTI-INTERRUPT OPERATION
Under certain condition, the software designer uses more than one interrupt requests. Processing multi-interrupt
request requires setting the priority of the interrupt requests. The IRQ flags of interrupts are controlled by the interrupt
event. Nevertheless, the IRQ flag “1” doesn’t mean the system will execute the interrupt vector. In addition, which
means the IRQ flags can be set “1” by the events without enable the interrupt. Once the event occurs, the IRQ will be
logic “1”. The IRQ and its trigger event relationship is as the below table.
Interrupt Name
Trigger Event Description
P00IRQ
P0.0 trigger controlled by PEDGE
P01IRQ
P0.1 trigger controlled by PEDGE
P02IRQ
P0.2 trigger controlled by PEDGE
T0IRQ T0C
overflow
TC0IRQ TC0C
overflow
TC1IRQ TC1C
overflow
SIOIRQ
SIO transmitting end.
ADCIRQ ADC
converting
end.
For multi-interrupt conditions, two things need to be taking care of. One is to set the priority for these interrupt requests.
Two is using IEN and IRQ flags to decide which interrupt to be executed. Users have to check interrupt control bit and
interrupt request flag in interrupt routine.
