SN8P275X Series
8-bit micro-controller build-in 12-bit ADC
SONiX TECHNOLOGY CO., LTD
Page 123
Version 0.7
10.7 Slave Mode Operation
When an address is matched or data transfer after and address match is received, the hardware automatically will
generate the acknowledge (ACK_) signal, and load MSPBUF (MSP buffer register) with the received data from
MSPSR.
There are some condition that will cause MSP function will not reply ACK_ signal:
z
z
z
Data Buffer already full: BF=1 (MSPSTAT bit 0), when another transfer was received.
z
z
z
Data Overflow: MSPOV=1 (MSPM1 bit 6), when another transfer was received
When BF=1, means MSPBUF data is still not read by MCU, so MSPSR will not load data into MSPBUF, but MSPIRQ
and MSPOV bit will still set to 1. BF bit will be clear automatically when reading MSPBUF register. MSPOV bit must be
clear through by Sofrware.
10.7.1 Addressing
When MSP Slave function has been enabled, it will wait a START signal occur. Following the START signal, 8-bit
address will shift into the MSPSR register. The data of MSPSR[7:1] is compare with MSPADDR register on the falling
edge of eight SCL pulse, If the address are the same, the BF and SSPOV bit are both clear, the following event occur:
1. MSPSR register is loaded into MSPBUF on the falling edge of eight SCL pulse.
2. Buffer full bit (BF) is set to 1, on the falling edge of eight SCL pulse.
3. An ACK_ signal is generated.
4. MSP interrupt request MSPIRQ is set on the falling edge of ninth SCL pulse.
Status when Data
is Received
BF MSPOV
MSPSP
Æ
MSPBUF
Reply
an
ACK
signal
Set
MSPIRQ
0 0
Yes
Yes
Yes
*0 *1
Yes
No
Yes
1 0
No
No
Yes
1 1
No
No
Yes
Data Received Action Table
Note1. BF=0, MSPOV=1 shows the software is not set properly to clear Overflow register.
