SN8P2711A
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 93
Version 0.1
8.3.4 TC1C COUNTING REGISTER
TC1C is an 8-bit counter register for TC1 interval time control.
0DDH
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TC1C
TC1C7 TC1C6 TC1C5 TC1C4 TC1C3 TC1C2 TC1C1 TC1C0
Read/Write R/W
R/W
R/W R/W R/W R/W R/W R/W
After
reset
0 0 0 0 0 0 0 0
The equation of TC1C initial value is as following.
TC1C initial value = N - (TC1 interrupt interval time * input clock)
N is TC1 overflow boundary number. TC1 timer overflow time has six types (TC1 timer, TC1 event counter, TC1 Fcpu
clock source, TC1 Fosc clock source, PWM mode and no PWM mode). These parameters decide TC1 overflow time
and valid value as follow table.
TC1CKS TC1X8 PWM1
ALOAD1
TC1OUT
N
TC1C valid
value
TC1C value
binary type
Remark
0
x
x
256
0x00~0xFF
00000000b~11111111b
Overflow per 256 count
1
0
0
256
0x00~0xFF
00000000b~11111111b
Overflow per 256 count
1
0
1
64
0x00~0x3F
xx000000b~xx111111b
Overflow per 64 count
1
1
0
32
0x00~0x1F
xxx00000b~xxx11111b
Overflow per 32 count
0
(Fcpu/2~
Fcpu/256)
1
1
1
16
0x00~0x0F
xxxx0000b~xxxx1111b
Overflow per 16 count
0
x
x
256
0x00~0xFF
00000000b~11111111b
Overflow per 256 count
1
0
0
256
0x00~0xFF
00000000b~11111111b
Overflow per 256 count
1
0
1
64
0x00~0x3F
xx000000b~xx111111b
Overflow per 64 count
1
1
0
32
0x00~0x1F
xxx00000b~xxx11111b
Overflow per 32 count
0
1
(Fosc/1~
Fosc/128)
1
1
1
16
0x00~0x0F
xxxx0000b~xxxx1111b
Overflow per 16 count
1
-
-
-
-
256
0x00~0xFF
00000000b~11111111b
Overflow per 256 count
¾
Example: To set 10ms interval time for TC1 interrupt. TC1 clock source is Fcpu (TC1KS=0, TC1X8=0) and
no PWM output (PWM1=0). High clock is external 4MHz. Fcpu=Fosc/4. Select TC1RATE=010 (Fcpu/64).
TC1C initial value = N - (TC1 interrupt interval time * input clock)
= 256 - (10ms * 4MHz / 4 / 64)
= 256 - (10
-2
* 4 * 10
6
/ 4 / 64)
= 100
= 64H
