SN8P2711A
8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD
Page 99
Version 0.1
8.4 PWM
MODE
8.4.1 OVERVIEW
PWM function is generated by TCn timer counter and output the PWM signal to PWMnOUT pin (P5.3/P5.4). The 8-bit
counter counts modulus 256, 64, 32, 16 controlled by ALOADn, TCnOUT bits. The value of the 8-bit counter (TCnC) is
compared to the contents of the reference register (TCnR). When the reference register value (TCnR) is equal to the
counter value (TCnC), the PWM output goes low. When the counter reaches zero, the PWM output is forced high. The
low-to-high ratio (duty) of the PWMn output is TCnR/256, 64, 32, 16.
PWM output can be held at low level by continuously loading the reference register with 00H. Under PWM operating, to
change the PWM’s duty cycle is to modify the TCnR.
Note: The “n” of TCn,TCnC… is 0 or 1 follow timer mode. “n=0” is TC0 mode. “n=1” is TC1 mode.
Note: TCn is double buffer design. Modifying TCnR to change PWM duty by program, there is no glitch
and error duty signal in PWM output waveform. Users can change TCnR any time, and the new reload
value is loaded to TCnR buffer at TCn overflow.
ALOADn TCnOUT PWM duty range TCnC valid value TCnR valid bits value
MAX. PWM
Frequency
(Fcpu = 4MHz)
Remark
0 0
0/256~255/256
0x00~0xFF 0x00~0xFF 7.8125K
Overflow per 256 count
0 1 0/64~63/64 0x00~0x3F 0x00~0x3F
31.25K
Overflow per 64 count
1 0 0/32~31/32 0x00~0x1F 0x00~0x1F
62.5K
Overflow per 32 count
1 1 0/16~15/16 0x00~0x0F 0x00~0x0F
125K
Overflow per 16 count
The Output duty of PWM is with different TCnR. Duty range is from 0/256~255/256.
TCn Clock
TCnR=00H
TCnR=01H
TCnR=80H
TCnR=FFH
0
1
128
254
255
……
……
0
1
128
254
255
……
……
Low
Low
Low
High
High
Low
High
