SIS SIS8300-KU, User Manual, Page: 56 / 92

Struck Documentation SIS8300-KU
MTCA.4 Digitizer
Page 56 of 92
7.5.26 DAC Trigger and DAC_CLK prescaler setup register
#define SIS8300_DAC_TRIGGER_PRECLK_REG 0x4E
The DAC uses the same clock source like the ADC 1. With the DAC CLK prescaler it is
possible to define a different clock period based on the ADC clock. The prescaler are set up
by the divider Bits:
1
_
_


divider
CLK SOURCE
CLK DAC
(A divider value of one generates a twice period time of the source)
The '
ADC trigger select Bits ' defines the internal trigger source:
0h = ADC_1, ..., 9h = ADC_10
Bit
write read
31 DAC 2 CLK divider Bit 7 DAC 2 CLK divider Bit 7
... ... ...
... ... ...
24 DAC 2 CLK divider Bit 0 DAC 2 CLK divider Bit 0
23 DAC 1 CLK divider Bit 7 DAC 1 CLK divider Bit 7
... ... ...
... ... ...
16 DAC 1 CLK divider Bit 0 DAC 1 CLK divider Bit 0
15 - 0
14 - 0
13 DAC 2 Enable external Trigger DAC 2 external Trigger enabled
12 DAC 2 Enable internal Trigger DAC 2 internal Trigger enabled
11 DAC 2 ADC trigger select Bit 3 DAC 2 ADC trigger select Bit 3
10 DAC 2 ADC trigger select Bit 2 DAC 2 ADC trigger select Bit 2
9 DAC 2 ADC trigger select Bit 1 DAC 2 ADC trigger select Bit 1
8 DAC 2 ADC trigger select Bit 0 DAC 2 ADC trigger select Bit 0
7 - 0
6 - 0
5 DAC 1 Enable external Trigger DAC 1 external Trigger enabled
4 DAC 1 Enable internal Trigger DAC 1 internal Trigger enabled
3 DAC 1 ADC trigger select Bit 3 DAC 1 ADC trigger select Bit 3
2 DAC 1 ADC trigger select Bit 2 DAC 1 ADC trigger select Bit 2
1 DAC 1 ADC trigger select Bit 1 DAC 1 ADC trigger select Bit 1
0 DAC 1 ADC trigger select Bit 0 DAC 1 ADC trigger select Bit 0
The power up default value is 0x0