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Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support
delay transactions cycles. Select Enabled to support compliance with
PCI specification version 2.1.
The Choice: Enabled, Disabled.
On-Chip Video Window Size
Select the on-chip video window size for VGA drive use.
The Choice: 32MB, 64MB, Disabled.
Local Memory Frequency
Select the memory frequency.
The Choice: 100MHz, 133MHz.
*** Onboard Display Cache Setting ***
Setting the onboard display cache timing.
CAS # Latency
Select the local memory clock periods.
The Choice: 2, 3
Paging Mode Control
Select the paging mode control.
The Choice: Close, Open.
RAS-to-CAS Override
Select the display cache clock periods control.
The Choice: by CAS# LT, Override(2).
RAS# Timing
This item controls RAS# active to Protegra, and refresh to RAS#
active delay ( in local memory clocks).
The Choice: Fast, Slow.
RAS# Precharge Timing
This item controls RAS# precharge (in local memory clocks).
The choice: Fast, Slow.
