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Advanced Chipset Features
This section allows you to configure the system based on the specific features
of the installed chipset. This chipset manages bus speeds and access to sys-
tem memory resources, such as DRAM and the external cache. It also coor-
dinates communications between the conventional ISA bus and the PCI bus.
It states that these items should never need to be altered. The default settings
have been chosen because they provide the best operating conditions for
your system. If you discovered that data was being lost while using your sys-
tem, you might consider making any changes.
DRAM Configuration
Options are in its sub-menu.
Press <Enter> to enter the sub-menu of detailed options.
Timing Mode
Ø
The Choice: Auto, or Manual.
Memclock index value (Mhz)
Places an artificial memory clock limit on the system.
Memory is prevented from running faster than this frequency.
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The Choice: 100Mhz, 133Mhz, 166Mhz, or 200Mhz.
CAS# latency (Tcl)
When synchronous DRAM is installed, the number of clock cycles of
CAS latency depends on the DRAM timing. Don't change this field from
the default value specified by the system designer.
Ø
The Choice: 2, 2.5, or 3.
