Shiratech Solutions Spark-100, Integration Manual, Page: 8 / 41

8 | Spark-100 HW user manual v1.3
VCCPD (FPGA architecture) while each bank has its own VCCIO. This adds some limitation to the banks
power levels options. The following table describes the various possibilities:
VCCPD Bank 3B Bank 4A
Set to 3.3V 3.3V only 3.3V only
Set to 2.5V 1.5V, 2.5V or 1.8V 1.5V, 2.5V or 1.8V
The power option required can be set in two ways either via switches located on the SOM (can be used
for debug and prototype) or via pins on the SMARC interface –
this option must be used in production .
Note - the pins cannot be based on I/Os set by software the pin state should be stable at power up
and cannot be changed after power up!
Figure 3 - Bank 3B/4A Power Switching
scheme
DC to DC
3.3, 2.5, 1.8V
1.5V FPGA
Power
Switch
Power
Switch
Programmable VCCIO
Bank 3B
1.5V, 1.8V, 2.5V, 3.3V 0.6A
1 2
3
ON
ON
VCCIO
Bank 3B
DC to DC
3.3, 2.5, 1.8V
1.5V FPGA
Power
Switch
Power
Switch
Programmable VCCIO
Bank 4A
1.5V, 1.8V, 2.5V, 3.3V 0.6A
1 4
5
ON
ON
VCCIO
Bank 4A