18 | Spark-100 HW user manual v1.3
The following figure describes the JTAG chain:
Figure 12 - SPARK-100 JTAG chain
A second switch can set the JTAG chain to include the HPS and FPGA or just the HPS. Both switches are
located in SW3 (see picture below)
The switches options are as follows:
JSEL0 0 FPGA in Chain (default)
1 FPGA not in chain
JSEL1 0 JTAG connector (default)
1 SMARC connector
Note: For production, the SOM provided without the JTAG connector; in that case the JTAG interface will
be available only on the SMARC interface.
Analog
Switch
TS3A5015
HPS
FPGA
Analog
Switch
TS3A5015
Module
Carrier
JTAG_I/O
JTAG
I/O
TDI
TDI
TDO
TDO
TDO
SW - 2
SW - 1
The left pin
is JSEL 1, the
Lower side is
off - '0'
Summary of Contents for Spark-100
Page 1: ...Spark 100 Altera Cyclone V SOC System on Module Integration guide Revision 1 3...
Page 35: ...35 Spark 100 HW user manual v1 3 Clock configuration...
Page 36: ...36 Spark 100 HW user manual v1 3 DDR setting...
Page 37: ...37 Spark 100 HW user manual v1 3...
Page 38: ...38 Spark 100 HW user manual v1 3...
Page 39: ...39 Spark 100 HW user manual v1 3...