Shiratech Solutions Spark-100, Integration Manual, Page: 22 / 41

22 | Spark-100 HW user manual v1.3
2.5 FPGA
The Spark 100 offer a range of FPGA sizes starting from 25KLEs and up to 110KLEs. The FPGA offers 145
I/Os and optionally additional 6 high speed transceivers.
2.5.1 FPGA IOs variation
The Spark-100 support several SOC variations starting from 25KLE and up to 110KLE for both SE and SX
series.
Altera offers the same package for all variations however there are differences between the pin out of
the different FPGA sizes. The 110KLE and 85KLE share the same pin out while the 40KLE and 25KLE share
different pin out.
The Spark was designed based on the 110/85 KLE (A6/A5) pin out which means that all the pins of the
FPGA in that configuration are supported and available on the SMARC interface.
However when the A2 or A4(25KLEs or 40KLEs) devices are used the following pins are not available and
should be handled as follows:
The following pins are tied to ground and are not available in the SMARC interface, since this is their
functionality in the A5/A6 devices and so these pins
should not be enabled in the FPGA when using an
A2/A4 device:
PIN_H4 GND
PIN_H5 GND
PIN_H6 GND
PIN_K8 GND
PIN_L8 GND
PIN_L9 GND
PIN_L10 GND
The following pins are available for the A6 and A5 when using an A2 orA4 device they should be
connected as follows:
PIN_W19 Not connected, leave open
PIN_W20 GND
PIN_W21 GND
PIN_W24 GND
PIN_W25 Not connected, leave open
PIN_Y24 GND