S3F84B8_UM_REV 1.00
4 CONTROL REGISTERS
4-8
4.1.5 CLKCON — CLOCK CONTROL REGISTER: D4H, BANK0
Bit Identifier
.7
.6
.5
.4
.3
.2
.1
.0
RESET Value
0 – – 0 0 – – –
Read/Write
R/W – – R/W
R/W – – –
Oscillator IRQ Wake-up Function Enable Bit
0
Enables IRQ for main system oscillator wake-up function.
.7
1
Disables IRQ for main system oscillator wake-up function.
.6–.5
Not used for S3F84B8.
Divided by Selection Bits for CPU Clock Frequency
0 0 Divide by 16 (f
OSC
/16)
0 1 Divide by 8 (f
OSC
/8)
1 0 Divide by 2 (f
OSC
/2)
.4–.3
1 1 Non-divided clock (f
OSC
)
.2–.0
Not used for S3F84B8.