FEDL22660-01
ML22660
Detects the stop of clock input from a crystal resonator or ceramic resonator.
Set the "Detects the stop of clock input from a crystal resonator or ceramic resonator" with the OSCEN bit of the SAFE
command.
When the clock input from the crystal resonator or the ceramic resonator is stopped, the error bit (OSCERR) is set to "1".
At the same time, the clock backup function is activated and the clock is automatically switched to the RC oscillator circuit
(4.096MHz).
Error bit (OSCERR) can be read with RDERR command. However, if the RDERR command (first byte) is inputted before
the crystal or ceramic resonator stops and switches to RC oscillation (about 500us), the CBUSYB pin will remain "L".
Therefore, read the command after the CBUSYB pin becomes "H". Also, error bit (OSCERR) can be cleared by ERRCL
command. However, if the clock input from the crystal resonator or the ceramic resonator continues to be stopped while the
OSCEN bit of the SAFE command is "1", the error bit (OSCERR) is set to "1".
When the crystal resonator or the ceramic resonator stops and switches to RC oscillation, playback may become abnormal.
Therefore, after confirming that the error bit (OSCERR) is "1", enter STOP command to stop playback.
If the clock input from the crystal resonator or the ceramic resonator is stopped while the OSCEN bit is "0", the error bit
(OSCERR) does not change to "1", but the clock backup function is activated and the clock backup circuit is automatically
switched to the RC oscillator circuit (4.096MHz).
*1 Set OSCEN = "1"
*2 Set OSCEN = "0"
*3 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
<When the OSCEN bit of SAFE command continue to be "1">
*1 Set OSCEN = "1"
*2 Misoperation detection and failure detection outputs are selected by OUTSTAT command.
Command
OSCERR
Error bit (OSCERR) is operating
STATUSn pin
*3
(n
：
1 or 2)
PUP
SAFE
*1
ERRCL
SAFE
*2
OSC0 pin
OSC1 pin
Normal oscillation state
Oscillation stopped state
Normal oscillation state
Internal clock
X’tal or
Ceramic resonator
RC oscillation
（
Clock backup state
）
X’tal or
Ceramic resonator
Oscillation stopped state
RC oscillation
（
Clock backup state
）
Normal oscillation state
X’tal or
Ceramic resonator
OSCEN
RDERR
Command
OSCERR
Error bit (OSCERR) is operating
STATUSn pin
*2
(n
：
1 or 2)
PUP
SAFE
*1
ERRCL
OSC0 pin
OSC1 pin
Normal oscillation state
Oscillation stopped state
Normal oscillation state
Internal clock
X’tal or
Ceramic resonator
RC oscillation
（
Clock backup state
）
X’tal or
Ceramic resonator
Oscillation stopped state
RC oscillation
（
Clock backup state
）
Normal oscillation state
X’tal or
Ceramic resonator
OSCEN
RDERR
ERRCL
35/116
Summary of Contents for LAPIS Semiconductor ML22660
Page 107: ...FEDL22660 01 ML22660 107 116 ...
