Rohm LAPIS Semiconductor ML22660 Manual Download Page 4 | Manualshive

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FEDL22660-01

ML22660

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Pin Description

Pin

Symbol

I/O

Attribute

Description

Initial

value

*1

1,18

DGND

G

-

Digital ground pin.

—

3

SAD0

I

-

I

2

C slave address select pin.

—

4

SCL

I

-

I

2

C slave serial clock pin.

Be sure to insert a pull-up resistor.

H

5

SDA

IO

-

I

2

C slave serial data input/output pin.

Be sure to insert a pull-up resistor.
Output: Nch MOS OPEN DRAIN output
Input: High-impedance input

H

6

SAD1

I

-

I

2

C slave address select pin.

—

7

SAD2

I

-

I

2

C slave address select pin.

—

9

ERCSB

O

Negative

Serial flash memory interface chip select output pin.
Output the "H" level during non-access and the "L" level during
access.
Setting the EROFF pin to "L" enables output.

H

10

ERSCK

O

-

Serial flash memory interface serial clock output pin.
Setting the EROFF pin to "L" enables output.

L

11

ERSI

I

-

Serial flash memory interface serial data input pin.
Setting the EROFF pin to "L" enables input.
A pull-down resistor is internally connected.

L

12

ERSO

O

-

Serial flash memory interface serial data output pin.
Setting the EROFF pin to "L" enables output.

L

13

EROFF

I

Positive

Pin to disable the serial flash memory interface.
When this bit is set to "L", the serial  flash memory interface pin is
enabled. A pull-down resistor is internally connected.
Set this  pin  to "L" during playback operation using serial  flash
memory.
When this pin set to "H",  the  serial  flash memory interface  is  in a
condition of high-impedance.
Set this bit to "H" for onboard rewriting.

L

*1 Initial value at reset input and power-down. The pin whose IO is "I" indicates a fixed level from outside.

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Summary of Contents for LAPIS Semiconductor ML22660

Page 1: ...he functions necessary for sound output are integrated into a single chip so that sound functions can be realized simply by adding this LSI Memory capacity and maximum sound production time HQ ADPCM 1 algorithm registered phrase 1024 Product Name Flash memory capacity Maximum sound production time sec fs 8 0kHz fs 16 0kHz fs 32 0kHz ML22660 128Mbits Serial Flash Memory 5240 2620 1310 Application C...

Page 2: ...aker amplifier Class AB D 1 0W 8Ω SPVDD 5V Ta 25 O C Line amplifier output 10kΩ driving Exclusive operation from speaker amplifier output External analog sound input at the time Class AB speaker amplifier choice with analog mixing function MCU command interface I2 C Interface Slaves Failure detection function Speaker short detection Speaker pin ground fault detection speaker pin short detection Sp...

Page 3: ... 17 18 19 20 21 22 23 24 16 15 14 13 12 11 10 25 26 27 28 29 30 31 N C SPP SPM RESETB TEST0 STATUS1 STATUS2 CBUSYB SPGND SPV DD AIN SG V DDL DV DD DGND XT TOP VIEW TQFP32 9 XTB N C IOVDD EROFF ERSO ERSI ERSCK ERCSB 32 DGND N C SAD0 SCL SDA SAD1 SAD2 N C N C Unused pin 3 116 ...

Page 4: ... Serial flash memory interface serial clock output pin Setting the EROFF pin to L enables output L 11 ERSI I Serial flash memory interface serial data input pin Setting the EROFF pin to L enables input A pull down resistor is internally connected L 12 ERSO O Serial flash memory interface serial data output pin Setting the EROFF pin to L enables output L 13 EROFF I Positive Pin to disable the seria...

Page 5: ...r connect it as close as possible Leave it open when not in use L 19 DVDD P Digital power supply pin Connect a bypass capacitor between this pin and the DGND pin 20 VDDL O 2 5V regulator output pin Used as internal power supply Connect a capacitor between this pin and DGND pin as close as possible L 21 SG O Reference voltage output pin for the built in speaker amplifier Connect a capacitor between...

Page 6: ...utput data is H level H 31 STATUS2 O Status error output pin 2 Execute OUTSTAT command to select BUSYB 3 and NCR 3 in each channel or errors The initial value is BUSYB 3 of channel 0 and output data is H level H 32 CBUSYB O Negative Command processing status signal output pin An L level is output during command processing Be sure to input a command with this pin at an H level 2 2 8 15 25 N C Unuse...

Page 7: ...tion CMOS inputs with pull down Applicable pin TEST0 B Attribute Input Power IOVDD Function CMOS inputs with pull down Applicable pin EROFF C Attribute Input Power DVDD Function CMOS inputs with pull up Applicable pin RESETB D Attribute Input Power DVDD Function CMOS inputs Applicable pins SAD0 SAD1 SAD2 7 116 ...

Page 8: ... STATUS2 CBUSYB G Attribute Input output Power IOVDD Function CMOS inputs Function CMOS outputs Applicable pin ERCSB ERSCK ERSO H Attribute Input output Power IOVDD Function CMOS inputs with pull down Function CMOS outputs Applicable pin ERSI I XT XTB Attribute Oscillator circuit Power DVDD Function 4 096M 4 000MHz oscillation Applicable pins XT XTB 8 116 ...

Page 9: ...it Overview J Attribute Analog Power SPVDD Function Sound output Applicable pins SPP SPM L Attribute Analog Power SPVDD Function Sound input Applicable pins AIN M Attribute Input Power DVDD Function Nch Open Drain Applicable pins SCL SDA 9 116 ...

Page 10: ...EC 4 layer board SPVDD 5V 1000 mW Output short circuit current IOS Applies to pins other than SPM SPP and VDDL pins 10 mA Applies to SPM and SPP pins 500 mA Applies to the VDDL pin 50 mA Storage temperature TSTG 55 to 150 C Recommended operating conditions DGND SPGND 0V Parameter Symbol Condition Range Unit DVDD IOVDD SPVDD 1 Power supply voltage DVDD IOVDD SPVDD 2 7 to 3 6 3 3 to 5 5 V Operating ...

Page 11: ...urrent 1 IOOH1 VOH DVDD in high impedance state SDA SCL 10 µA IOOL1 VOL DGND in high impedance state 10 µA Output leakage current 2 IOOH2 VOH IOVDD in high impedance state ERCSB ERSCK ERSO 10 µA IOOL2 VOL DGND in high impedance state 10 µA H input current 1 IIH1 VIH DVDD XT 0 8 5 0 20 µA H input current 2 IIH2 VIH DVDD RESETB SDA SCL 10 µA H input current 3 IIH3 VIH DVDD TEST0 20 500 1000 µA H inp...

Page 12: ... Ω Line amplifier output load resistance 1 RLA For SPGND 10 kΩ Line amplifier Out put Voltage Range 1 VAO No output load SPVDD 6 SPVDD 5 6 V SG pin output voltage VSG 0 95x SPVDD 2 SPVDD 2 1 05x SPVDD 2 V SG pin output resistance RSG 57 96 135 kΩ SPP SPM pins Output Load Resistance RLSP1 6 8 Ω To the SPP and SPM pins Short circuit detection ROCDAB Class AB speaker amplifier 4 5V SPVDD 5 5V 0 1 6 Ω...

Page 13: ... external clock input DAMP L POP H AEN1 L H 72 74 76 ms At AMODE command input CBUSYB L level output time tPUPA3 4 096MHz external clock input DAMP L POP L AEN1 L H 32 34 36 ms At PDWN command input CBUSYB L level output time tPD fOSC 4 096MHz 10 μs At AMODE command input CBUSYB L level output time tPDA1 4 096MHz external clock input POP L AEN1 L AEN0 H L 106 108 110 ms At AMODE command input CBUS...

Page 14: ...ax Unit SCL clock frequency tSCL 0 400 kHz SCL hold time start restart condition tHD STA 0 6 μs SCL clock L level time tLOW 1 3 μs SCL clock H level time tHIGH 0 6 μs SCL setup time restart condition tSU STA 0 6 μs SDA hold time tHD DAT 0 μs SDA setup time tSU DAT 0 1 μs SDA setup time stop condition tSU STO 0 6 μs Bus free time tBUF 1 3 μs Capacitive load on each bus line Cb 400 pF 14 116 ...

Page 15: ...s ERSCK hold time from ERCSB rising edge tECSH 50 ns Data setup time from ERSCK rising edge tEDIS 10 ns Data hold time from ERSCK rising edge tEDIH 10 ns Data delay time from ERSCK falling edge tEDOD 5 ns ERSCK frequency tESCKF 1 228 16 384 17 20 MHz ERSCK H level pulse width tESCKH 26 ns ERSCK L level pulse width tESCKL 26 ns ERCSB ERSC ERSO delay time from EROFF rising edge tEFLH 1 ms ERCSB ERSC...

Page 16: ...PLL OSC4 096MHz or 4 000MHz PCM Synthesizer XT XTB Digital Mixing DVDD DGND VDDL RESETB TEST0 RC4 096MHz Command Analyzer ERCSB ERSCK ERSI ERSO EROFF IOVDD CBUSYB STATUS1 STATUS2 MCU Interface SCL SDA SAD0 SAD1 SAD2 16bit DAC LINE Amplifier Analog Mixing AIN SPVDD SPGND SPP SPM SG ΔΣ AB Class Amplifier PWM D Class Amplifier LPF 16 116 ...

Page 17: ...dress upper 3 bits of the slave address are set by the SAD0 to 2 pins is entered in the first 7 bits the data direction is determined in the 8th bit when the 8th bit is 0 data is written from the master and data is read from the master when 1 and communication is performed in byte units thereafter At this time acknowledgment is required for each byte The I2 C communication flow timing chart is sho...

Page 18: ...ommand Data P CBUSYB D7 D6D5 D4 D3D2 D1 A D0 A 2nd Command Data Command flow when writing data 3 byte command Start condition Slave address W 0 Write data ex Command 1st byte Write data ex Command 2nd byte Write data ex Command 3rd byte Stop condition Timing chart when writing data 3 byte command SCL SDA S A6 A5 A4 A3 A2 A1 A0 A W D7 D6D5 D4 D3D2 D1 A D0 A A Slave Address 1st Command Data CBUSYB D...

Page 19: ...chart when reading data 1 When the two time input mode the error state reading is 2 bytes The data read flow is used when data is read by RDSTAT RDERR RDVER commands The data to be read is updated by inputting RDSTAT RDERR RDVER command Be sure to enter the RDSTAT RDERR RDVER command before reading the internal status The slave address can be set as follows using the SAD2 to SAD0 pins SAD2 SAD1 SA...

Page 20: ...ing and the AMODE can set the input gain to the amplifier By using the fade function with FADE command the volume can be adjusted stepwise when the volume is changed with CVOL 3 0 0 1 2 3 AIN SPP SPM Channel 0 CH0 Channel 1 CH1 Channel 2 CH2 Channel 3 CH3 MIXING CVOL command FADE command GAIN AMP Setting AIG of AMODE command Setting DAG of AMODE command GAIN AMP AVOL command LPF DAC LINE AMP Speak...

Page 21: ...Q ADPCM 1 5 4bit ADPCM algorithm is improved Adopting variable bit length enables high sound quality and high data compression Suitable for sound effects with sharp changes in waveforms or for pulsed waveforms 8 bit non linear PCM 1 2 This algorithm enables playing back a sound with 10 bit equivalent quality in the center of the waveform Suitable for low amplitude sounds that are easily distorted ...

Page 22: ...apacity sampling frequency and playback algorithm The relationship is shown below However this is the playback time when the edit ROM function is not used When the number of phrases is 1024 the sampling frequency is 16kHz and the HQ ADPCM algorithm is selected the playback time will be approximately 81 seconds Configuration of Serial Flash Memory Data 4Mbit Edit ROM area Depends on creation of ROM...

Page 23: ...on the memory capacity only Silence insertion 20 to 1024 ms Using the edit ROM function enables an effective use of the memory capacity of sound ROM Below is an example of the ROM configuration in the case of using the edit ROM function Phrase 1 Phrase 2 Phrase 3 Phrase 4 A D A C E B E C Phrase 5 D D D B A D B E C D Silence A B C D E Address control area Editing area Examples of Phrases Using the ...

Page 24: ...e calculation of the synthesis If the clamp is known to be generated in advance adjust the volume of each channel by CVOL command SPVDD SPGND Channel 0 Channel 1 For channels 0 and 1 Mixing waveform If the result of mixing channels 0 and 1 exceeds from the 1 6SPVDD to 5 6SPVDD level as indicated by the broken line the sound quality may be reduced by clamping Waveforms when AVOL is set to 0 0dB 1 6...

Page 25: ...z 22 05kHz 44 1kHz Group 3 12 0kHz 24 0kHz 48 0kHz Group 4 10 7kHz 21 3kHz Group 5 The figure below shows the operation image when a sampling frequency group with different sampling frequency group is played back Figure 1 Case where a phrase is played at a sampling frequency belonging to a different sampling frequency group during playback on channels 1 and 2 Figure 2 Case where a phrase is played...

Page 26: ... command can be used to send whether an error is detected or not to the STATUS1 pin or STATUS2 pin For SAFE RDERR ERRCL and OUTSTAT commands refer to the Command section Misoperation detection and failure detection are shown below Command error detection Speaker disconnection detection LSI temperature error detection SPP pin and SPM pin short detection Flash memory error detection Watchdog timer o...

Page 27: ...he two times input mode This LSI has a function to input various commands and data two times to prevent malfunction due to noise at the serial interface pin The setting of the two times input mode is made at power up Refer to the PUP command for the setting method In the two times input mode the command data is input two times in succession and it is valid only when the input data matches If a mis...

Page 28: ...bit of the SAFE command When the TSDEN bit is set to 1 by the SAFE command LSI temperature error detection starts When the TSDEN bit is set to 0 LSI temperature error detection ends When the LSI becomes 130O C or more the error bit TSDERR becomes 1 Error bit TSDERR can be read with RDERR command Also error bit TSDERR can be cleared by ERRCL command 1 Set TSDEN 1 2 Set TSDEN 0 3 Misoperation detect...

Page 29: ...g power down with the AMODE command Then use ERRCL command to clear the error bit SPDERR To restart playback use the AMODE command to analog power up the speaker amplifier output mode and enter the PLAY command However if shorting to ground continues the error bit SPDERR is set to 1 and the speaker amplifier output pin SPP SPM is forcibly turned off simultaneously Short detection prevents damage t...

Page 30: ... the PUP command and before the PLAY command or START command starts playback this LSI may have error at the time of start In such cases initialize this LSI by moving the LSI to the power down mode by resetting the LSI by the RESETB pin or by using PDWN command Access outside the flash memory address range If the flash memory is accessed outside the flash memory address range an error is detected ...

Page 31: ...r the WDTCL command The count time of the WDT counter is 2s the initial value The counting time can be set to 125ms 500ms 2s or 4s In addition it is possible to shift to the command wait state after power up by the second overflow of the WDT counter The count time and the second overflow operation can be set with the dedicated tools Speech LSI Utility 1 Misoperation detection and failure detection...

Page 32: ...ction outputs are selected by OUTSTAT command WDTEN Set WDTEN 1 Count up WDT counter WDT overflow WDTERR 2 RSTERR 2 0h Command SAFE WDTCL Count up 0h Count up 0h STATUSn pin 1 n 1 or 2 Change to RSTERR 1 on the second overflow of the WDT counter Shifts to the command standby state after power up Change to WDTERR 1 on the first overflow of the WDT counter Status Stop WDT WDT operation Stop WDT Sign...

Page 33: ...unter is 2s the initial value The counting time can be set to 125ms 500ms 2s or 4s In addition the RST counter overflow can cause a transition to the command standby state after power up Set the counting time and overflow operation with the dedicated tools Speech LSI Utility The operation when RSTEN is set to 1 is as follows 1 Misoperation detection and failure detection outputs are selected by OU...

Page 34: ...mmand and the state configured by OUTSTAT command remain When Transition to command standby state after power up is not selected by the overflow of the RST counter 1 Misoperation detection and failure detection outputs are selected by OUTSTAT command RSTEN 2 Set RSTEN 1 RST counter Overflow RSTERR 3 Command SAFE Count up 0h STATUSn pin 1 3 n 1 or 2 Signal to shift command standby state after power...

Page 35: ...layback If the clock input from the crystal resonator or the ceramic resonator is stopped while the OSCEN bit is 0 the error bit OSCERR does not change to 1 but the clock backup function is activated and the clock backup circuit is automatically switched to the RC oscillator circuit 4 096MHz 1 Set OSCEN 1 2 Set OSCEN 0 3 Misoperation detection and failure detection outputs are selected by OUTSTAT ...

Page 36: ...terface When the EROFF pin set to H the serial flash memory can be rewritten using the ERCSB ERSCK ERSI and ERSO pins without this LSI ERCSB ERSCK and ERSO pins are in a condition of high impedance VOH VOL EROFF Status Hi Z Status ERSCK ERSO Output Status VOH VOL VOH VOL tEFLH ERCSB VIH VIL Hi Z Hi Z Hi Z EROFF ERCSB ERSCK ERSO ERSI SOUND LSI Serial flash memory Interface Serial flash memory CSB S...

Page 37: ...n the SPVDD and DVDD shut down at the same time or the SPVDD shuts down and then the IOVDD and DVDD shut down at the same time The DVDD SPVDD and IOVDD can also shut down at the same time SPVDD IOVDD 90 DVDD VIH VIL tRST RESETB After the power is turned on the device enters the power down state Start up in order of DVDD SPVDD and IOVDD or DVDD IOVDD and SPVDD It is possible that the DVDD and SPVDD...

Page 38: ...et input timing The same timing is applied when a reset is input during command standby tRST RESETB XT XTB Oscillating Oscillation stopped GND GND Hi Z VDDL SPM SPP Status Power down During playback Reset GND SG VIH VIL 38 116 ...

Page 39: ...FEDL22660 01 ML22660 Serial flash memory interface timing ERCSB ERSCK ERSI VIH VIL VIL VIH VIL VIH tECSH ERSO VOL VOH tEFLH tEFHL VIH VIL EROFF tECSS tEDIS tEDIH tESCKL tESCKH tEDOD tESCKF 39 116 ...

Page 40: ...FEDL22660 01 ML22660 I2 C Slave I2 C Interface Timing SCL SDA Start Condition Restart Condition Stop Condition tBUF tHD STA tLOW tHIGH tSU STA tHD STA tSU DAT tHD DAT tSU STO 40 116 ...

Page 41: ... Oscillation stopped internal internal VOH VOL tPD CBUSYB SCL SDA Slave Address A W A XT XTB 1 Oscillating Oscillation stopped RC Oscillation internal Power up DGND VDDL Status Oscillation stabilized NCRn BUSYBn Power down RC Oscillation Oscillating Oscillation stopped Awaiting command internal internal VOH VOL CBUSYB tPUP SCL SDA Slave Address A W A XT XTB 1 Oscillating Oscillation stopped intern...

Page 42: ...standby AMODE command 1 st byte AMODE command 2 nd byte LINE output GND SPM GND 1 2SPVDD SPP Hi Z 1 2SPVDD VOH VOL CBUSYB tCB1 tPUPA1 internal internal internal 1 2SPVDD SCL SDA Slave Address A W A A Status Command is being processed Awaiting command NCR BUSYB Awaiting command Command is being processed Awaiting command AMODE command 1 st byte AMODE command 2 nd byte SPM GND GND SPP Hi Z VOH VOL C...

Page 43: ...ommand AMODE command 1 st byte AMODE command 2 nd byte SPP VOH VOL CBUSYB GND 1 2SPVDD Command is being processed internal internal tCB1 tPUPA3 SCL SDA Slave Address A W A A Status Command is being processed NCR BUSYB Awaiting command Awaiting command Awaiting command AMODE command 1 st byte AMODE command 2 nd byte SPP VOH VOL CBUSYB GND 1 2SPVDD Command is being processed POP noise suppressed int...

Page 44: ...ting command Awaiting command AMODE command 1 st byte AMODE command 2 nd byte LINE output internal SPM SPP CBUSYB tCB1 tPDA1 GND 1 2SPVDD GND 1 2SPVDD Hi Z 1 2SPVDD SCL SDA Slave Address A W A A VOH VOL Status Command is being processed NCR internal BUSYB internal Awaiting command Command is being processed Awaiting command Awaiting command AMODE command 1 st byte AMODE command 2 nd byte SPM SPP C...

Page 45: ...g command AMODE command 1 st byte AMODE command 2 nd byte SPP VOH VOL CBUSYB GND 1 2SPVDD Command is being processed POP noise suppressed internal internal tCB1 tPDA2 SCL SDA Slave Address A W A A Status Command is being processed NCR BUSYB Awaiting command Awaiting command Awaiting command AMODE command 1 st byte AMODE command 2 nd byte SPP VOH VOL CBUSYB GND 1 2SPVDD Command is being processed i...

Page 46: ...FEDL22660 01 ML22660 WDTCL command timing Status Normal mode Awaiting command WDTCL command CBUSYB Awaiting command Command is being processed tCB1 SCL SDA Slave Address A W A VOH VOL 46 116 ...

Page 47: ...Status NCRn BUSYBn Command is being processed Awaiting command AVOL command 1 st byte VOH VOL CBUSYB internal internal Command is being processed Awaiting command AVOL command 2 nd byte tCB1 tCB1 SCL SDA Slave Address A W A A Status Awaiting command NCRn BUSYBn Command is being processed tCB1 Awaiting command FADE command 1 st byte VOH VOL CBUSYB internal internal tCB1 Command is being processed A...

Page 48: ... command Status Command is being processed NCRn BUSYBn Awaiting command Awaiting command FADR command 1 st byte FADR command 2 nd byte internal internal VOH VOL CBUSYB Awaiting command Command is being processed tCB1 SCL SDA Slave Address A W A A tCB1 48 116 ...

Page 49: ...he playback channel becomes H level The NCR signal goes to the L level during playback preparation and goes to the H level when playback preparation is completed and playback starts When the NCR signal of the playback channel becomes H level the PLAY command of the next phrase to be played can be accepted 1 The length of the L interval in the BUSYBn is tCB2 sound production time Status Command is ...

Page 50: ...thout silence sounds after the current phrase playback ends When the playback is not continuous input the PLAY command for the next phrases after confirming the playback is completed by RDSTAT command etc Status Playing phrase 1 NCRn BUSYBn SPM 1 2SPVDD SPP 1 2SPVDD Address is being controlled Awaiting command PLAY command 2 nd byte PLAY command 1 st byte Playing phrase 2 tcm internal internal VOH...

Page 51: ... H level The NCR signal goes to the L level during playback preparation and goes to the H level when playback preparation is completed and playback starts When the NCR signal of the playback channel becomes H level the START command of the next phrase to be played can be accepted 1 The length of the L interval in the BUSYBn is tCB2 sound production time Status Playing NCRn BUSYBn Awaiting command ...

Page 52: ...ithout silence sounds after the current phrase playback ends When the playback is not continuous input the START command for the next phrases after confirming the playback is completed by RDSTAT command etc Status Playing phrase 1 NCRn BUSYBn SPM 1 2SPVDD SPP 1 2SPVDD Address is being controlled Awaiting command START command FADR command 1 st byte 2 nd byte Playing phrase 2 START command tcm inte...

Page 53: ... 025 22 05 44 1kHz Approx 2 9ms At 12 0 24 0 48 0kHz Approx 2 7ms Status Awaiting command NCRn BUSYBn SPM 1 2SPVDD SPP 1 2SPVDD Playing STOP command internal internal VOH VOL CBUSYB tCB3 fs 1cycle SCL SDA Slave Address A W A Command is being processed Status Awaiting command NCRn BUSYBn SPM 1 2SPVDD SPP 1 2SPVDD Playing STOP command internal internal VOH VOL CBUSYB tCB3 Changed by sampling frequen...

Page 54: ...playback channels become H level The NCR signal becomes L level during playback preparation and becomes H level when playback preparation is completed and playback starts When the NCR signal of the playback channel becomes H level the PLAY command of the next phrase to be played can be accepted 1 The length of the L interval of the BUSYBn is tCB2 silence playback time Status Command is being proce...

Page 55: ...nd of the playback of silence sound After ending the playback of silence sound and starting the playback of phrase 1 the NCR signal changes to H level and LSI is in state that accepts the next PLAY or MUON command The BUSYB signal remains L level until the sequence of playback is completed When making continuous playbacks input the MUON PLAY START command for the next phrases within 10ms tcm after...

Page 56: ...vel This enables the SLOOP command and repeats playback While the repeat playback mode is set the NCR signal is L level Status 1st Repeat playing BUSYBn SPM 1 2SPVDD SPP 1 2SPVDD Address is being controlled Awaiting command Awaiting command PLAY command 2nd byte Address is being controlled Command is being processed internal SLOOP command CLOOP command 2nd Repeat playing NCRn VOH VOL CBUSYB intern...

Page 57: ...TAT command Write 1st byte Awaiting command SCL SDA SlaveAddress A W A tCB1 SlaveAddress A R Awaiting command Under reading RDSTAT command Read 2nd byte A VOH VOL Status NCRn BUSYBn Command is being processed Awaiting command CVOL command 1 st byte VOH VOL CBUSYB tCB1 internal internal Awaiting command CVOL command 2 nd byte tCB1 Command is being processed Awaiting command SCL SDA Slave Address A ...

Page 58: ...ng command SCL SDA SlaveAddress A W A tCB1 SlaveAddress A R Awaiting command Under reading RDVER command Read 2nd byte A VOH VOL Status NCR BUSYB Command is being processed Awaiting command CBUSYB internal internal RDERR command Write 1st byte Awaiting command SCL SDA SlaveAddress A W A tCB1 SlaveAddress A R Awaiting command Under reading RDERR command Read 2nd byte A VOH VOL 58 116 ...

Page 59: ...TUS2 SCL SDA Slave Address A W A A tCB1 tCB1 OUTSTAT command 2 nd byte VOH VOL Status NCR BUSYB Command is being processed Awaiting command CBUSYB internal internal tCB1 tCB1 Command is being processed SCL SDA Slave Address A W A A Awaiting command Awaiting command SAFE command 1st byte SAFE command 2nd byte VOH VOL ERRCL command VOH VOL tCB1 00h 20h 00h CBUSYB internal RDERR ERR register SCL SDA ...

Page 60: ...yback preparation is completed and playback starts When the NCR signal of the playback channel becomes H level the PLAY command of the next phrase to be played can be accepted 1 The length of the L interval in the BUSYBn is tCB2 sound production time Status Command is being processed NCRn BUSYBn Awaiting command Awaiting command FADR2 command 1 st byte FADR2 command 3 rd byte internal internal VOH...

Page 61: ... 0 FADR 0 0 1 1 F9 F8 C1 C0 F7 F6 F5 F4 F3 F2 F1 F0 PLAY 0 1 0 0 F9 F8 C1 C0 F7 F6 F5 F4 F3 F2 F1 F0 START 0 1 0 1 CH3 CH2 CH1 CH0 STOP 0 1 1 0 CH3 CH2 CH1 CH0 MUON 0 1 1 1 CH3 CH2 CH1 CH0 M7 M6 M5 M4 M3 M2 M1 M0 SLOOP 1 0 0 0 CH3 CH2 CH1 CH0 CLOOP 1 0 0 1 CH3 CH2 CH1 CH0 CVOL 1 0 1 0 CH3 CH2 CH1 CH0 0 CV1 CV0 CV6 CV5 CV4 CV3 CV2 RDSTAT 1 0 1 1 0 0 0 0 BUSYB3 BUSYB2 BUSYB1 BUSYB0 NCR3 NCR2 NCR1 NC...

Page 62: ...d data inputs are set to the two times input mode and the command is accepted only when they match If they do not match the accepted command is discarded Refer to the RDSTAT command OUTSTAT command and SAFE command for handling when a mismatch occurs Even if two times input modes are used for the I2 C interface one time input is used for the slave address input If the slave address matches ACK is ...

Page 63: ... using analog mixing from the AIN pin set DAMP 0 Class AB amplifier is used HPF Description 0 No high pass filter is used 1 Use a high pass filter with a cut off frequency of 200Hz FAD Description 0 Fade out is not processed when inputting STOP command 1 Fade out when inputting STOP command The fade out processing BUSYB signal becomes L and becomes H after processing is completed DAG1 DAG0 Descrip...

Page 64: ...t the specified time tPDA3 and the line amplifier output enters the power down state The settings of the AEN1 AEN0 POP bits for power down and power up of the analog section when the speaker amplifier output and line amplifier output are as follows When using a Class D amplifier with speaker amplifier outputs set it to the power up state AEN1 AEN0 01 or the power down state AEN1 AEN0 00 If DAMP 1 ...

Page 65: ...ng DAMP bit 1 AEN1 bit 0 AEN0 bit 0 1 Line amplifier power up timing DAMP bit 0 POP bit 1 AEN1 bit 0 1 AEN0 bit 0 Line amplifier power up timing DAMP bit 0 POP bit 0 AEN1 bit 0 1 AEN0 bit 0 Speaker amplifier power down timing DAMP bit 0 AEN1 bit 0 AEN0 bit 1 0 Speaker amplifier power down timing DAMP bit 1 AEN1 bit 0 AEN0 bit 1 0 Line amplifier power down timing DAMP bit 0 POP bit 1 AEN1 bit 1 0 A...

Page 66: ... is set to 4 0dB Also the setting values of the AVOL command are retained when the STOP command is inputted but they are initialized when the power is down AV5 AV2 Description AV5 AV2 Description F 12 0dB 7 8 0dB E 10 0dB 6 12 0dB D 8 0dB 5 18 0dB C 6 0dB 4 26 0dB B 4 0dB 3 34 0dB A 2 0dB 2 Prohibited 9 0 0dB 1 Prohibited 8 4 0dB initial value 0 OFF For timing of the AVOL command refer to the Chan...

Page 67: ...in 0 dB 32 32768 steps 0 1 1 Volume change in 0 dB 16 32768 steps 1 0 0 Volume change in 0 dB 8 32768 steps 1 0 1 Volume change in 0 dB 4 32768 steps 1 1 0 Volume change in 0 dB 2 32768 steps 1 1 1 Volume change in 0 dB 1 32768 steps The smaller the voltage step that changes for each sampling frequency group the less the pop noise but the longer the transition time until the set volume is reached ...

Page 68: ...and can be input regardless of the NCR signal status For information about the operation of the watchdog timer refer to the Misoperation detection and failure detection functions Watchdog timer overflow detection in the Function description For the timing of WDTCL command refer to the WDTCL command timing in the timing chart 68 116 ...

Page 69: ...red after power up It is invalid when the BUSYB signals of any channels are L After inputting the PDWN command oscillation stops following the elapse of the command processing time tPD The states of the analog output pins during power down are shown below Analog output pin Condition VDDL DGND SG DGND SPM HiZ SPP SPGND For the power down timing by PDWN command refer to the Power Down timing in the ...

Page 70: ... the playback phrases of each channel are specified The phrases F9 F0 to be played back are specified when creating sound ROM data Set the phrase specified when creating This command can only set up to 0 to 1023 phrases To specify 1024 phrases or more use FADR2 command The channel settings are as follows C1 C0 Description 0 0 Channel 0 0 1 Channel 1 1 0 Channel 2 1 1 Channel 3 For the timing of th...

Page 71: ...ating sound ROM data Set the phrase specified when creating This command can only set up to 0 to 1023 phrases To specify 1024 phrases or more use PLAY2 command The channel settings are as follows C1 C0 Description 0 0 Channel 0 0 1 Channel 1 1 0 Channel 2 1 1 Channel 3 For the playback start timing by the PLAY command refer to the Playback start timing by PLAY command in the timing chart For the t...

Page 72: ...n this bit is set to 1 channel 0 is played back CH1 When this bit is set to 1 channel 1 is played back CH2 When this bit is set to 1 channel 2 is played back CH3 When this bit is set to 1 channel 3 is played back Be sure to specify one of the channels for the channel setting CH0 CH3 Do not input it to 0 all 0 with specifying nothing If it is input with specifying nothing all 0 the command is ignor...

Page 73: ...comes H If the BUSYB signal does not become H enter the STOP command again Refer to the Playback stop flow in the command flowchart for more information The channel settings are as follows Channeled Description CH0 Setting this bit to 1 stops channel 0 CH1 Setting this bit to 1 stops channel 1 CH2 Setting this bit to 1 stops channel 2 CH3 Setting this bit to 1 stops channel 3 Be sure to specify on...

Page 74: ...more tmu 20ms tmu 27 M7 26 M6 25 M5 24 M4 23 M3 22 M2 21 M1 20 M0 1 4ms The channel settings are as follows Channeled Description CH0 Setting this bit to 1 inserts silence into channel 0 CH1 Setting this bit to 1 inserts silence into channel 1 CH2 Setting this bit to 1 inserts silence into channel 2 CH3 Setting this bit to 1 inserts silence into channel 3 Be sure to specify one of the channels for...

Page 75: ...Also if the phrase has been edited the edited phrase is played repeatedly The channel settings are as follows Channeled Description CH0 Setting this bit to 1 repeats playback on channel 0 CH1 Setting this bit to 1 repeats playback on channel 1 CH2 Setting this bit to 1 repeats playback on channel 2 CH3 Setting this bit to 1 repeats playback on channel 3 Be sure to specify one of the channels for t...

Page 76: ...neled Description CH0 Setting this bit to 1 cancels repeat playback on channel 0 CH1 Setting this bit to 1 cancels repeat playback on channel 1 CH2 Setting this bit to 1 cancels repeat playback on channel 2 CH3 Setting this bit to 1 cancels repeat playback on channel 3 Be sure to specify one of the channels for the channel setting CH0 CH3 Do not input it to 0 all 0 with specifying nothing If it is...

Page 77: ...31 7 06dB 39 14 63dB 41 0 43dB 49 3 18dB 51 7 22dB 59 15 02dB 61 0 50dB 69 3 28dB 71 7 38dB 79 15 42dB 02 0 58dB 0A 3 38dB 12 7 55dB 1A 15 85dB 22 0 65dB 2A 3 49dB 32 7 72dB 3A 16 29dB 42 0 73dB 4A 3 59dB 52 7 89dB 5A 16 76dB 62 0 81dB 6A 3 70dB 72 8 06dB 7A 17 26dB 03 0 88dB 0B 3 81dB 13 8 24dB 1B 17 79dB 23 0 96dB 2B 3 92dB 33 8 43dB 3B 18 35dB 43 1 04dB 4B 4 03dB 53 8 61dB 5B 18 95dB 63 1 12dB ...

Page 78: ...4dB 1F 44 37dB The channel settings are as follows Channeled Description CH0 Setting this bit to 1 set the volume of channel 0 CH1 Setting this bit to 1 set the volume of channel 1 CH2 Setting this bit to 1 set the volume of channel 2 CH3 Setting this bit to 1 set the volume of channel 3 Be sure to specify one of the channels for the channel setting CH0 CH3 When multiple channels are specified the...

Page 79: ...1 BUSYB0 NCR3 NCR2 NCR1 NCR0 The NCR signal outputs L during command processing and playback standby and outputs H in other states The BUSYB signal outputs L during command processing and playback sound and outputs H in other states D7 to D0 Description BUSYB3 BUSYB outputs of channel 3 BUSYB2 BUSYB outputs of channel 2 BUSYB1 BUSYB outputs of channel 1 BUSYB0 BUSYB outputs of channel 0 NCR3 NCR o...

Page 80: ...on in the second byte after command input set the SI pin to L The identification information read in the second byte is as follows 2nd byte D7 D6 D5 D4 D3 D2 D1 D0 Output data VER7 VER6 VER5 VER4 VER3 VER2 VER1 VER0 Sound ROM identification information can be set by using dedicated tool Speech LSI Utility when creating sound ROM data For the timing of the RDVER command refer to the RDVER command t...

Page 81: ...RR This bit is set to 1 when the disconnection of the speaker connected to the SPP and SPM pins is detected TSDERR This bit is set to 1 when the LSI temperature becomes 130 C or higher SPDERR This bit is set to 1 when the SPP pin and the SPM pin are short circuited or when the SPP pin or the SPM pin is short circuited to GND ROMERR This bit is set to 1 when an error is detected in the flash memory...

Page 82: ...TUS2 pin STA1 STA0 Description 0 0 BUSYB 0 1 NCR 1 0 Misoperation detection and Failure Detection 1 1 Channeled Description CH0 Setting this bit to 1 selects channel 0 CH1 Setting this bit to 1 selects channel 1 CH2 Setting this bit to 1 selects channel 2 CH3 Setting this bit to 1 selects channel 3 Channel settings are enabled when BUSYB or NCR is specified in the STA1 STA0 Multiple channels can a...

Page 83: ...ter the playback phrases of the channels are specified The phrases F11 F0 to be played back are specified when creating sound ROM data Set the phrase specified when creating The channel settings are as follows C1 C0 Description 0 0 Channel 0 0 1 Channel 1 1 0 Channel 2 1 1 Channel 3 When the number of phrases to be played is 1024 or less the channels and phrases can be specified by FADR command Fo...

Page 84: ...level The phrases F11 F0 to be played back are specified when creating sound ROM data Set the phrase specified when creating The channel settings are as follows C1 C0 Description 0 0 Channel 0 0 1 Channel 1 1 0 Channel 2 1 1 Channel 3 When the number of phrases to be played is 1024 or less the channels and phrases can be specified by PLAY command For the playback start timing by the PLAY2 command ...

Page 85: ...on SPDEN Set the detection of short circuit between the SPP pin and the SPM pin ROMEN Set error detection of flash memory WDTEN 1 Operate the watchdog timer and set overflow detection RSTEN 1 Operate the RST counter and set overflow detection when any error is detected OSCEN Set stop detection of clock input from a crystal resonator or ceramic resonator 1 Do not set WDTEN and RSTEN to 1 at the sam...

Page 86: ...its that can be read by the RDERR command This command can be input regardless of the NCR signal status However if the error continues the error bit remains in the error status even if the ERRCL command is entered For the timing of the ERRCL command refer to the ERRCL command timing in the timing chart 86 116 ...

Page 87: ...FEDL22660 01 ML22660 Command Flowchart 1 byte command input flow Applies to PUP WDTCL PDWN START STOP SLOOP CLOOP and ERRCL commands Command input End Yes No Start No Yes CBUSYB H CBUSYB H 87 116 ...

Page 88: ... ML22660 2 byte command input flow Applies to AMODE AVOL FADE FADR PLAY MUON CVOL OUTSTAT SAFE commands 1st byte command input 2nd byte command input End Yes No Yes No Start Yes No CBUSYB H CBUSYB H CBUSYB H 88 116 ...

Page 89: ...ML22660 3 byte command input flow Applies to FADR2 PLAY2 commnad 1st byte command input 3rd byte command input End Yes No Yes No Start Yes No CBUSYB H CBUSYB H CBUSYB H 2nd byte command input Yes No CBUSYB H 89 116 ...

Page 90: ...FEDL22660 01 ML22660 Read flow Applies to RDSTAT RDVER RDERR commands 1st byte command input Read status SI L Yes No CBUSYB H Start End 90 116 ...

Page 91: ...FEDL22660 01 ML22660 Power on flow Power on RESETB L RESETB H Yes No Wait 10us Power down state 91 116 ...

Page 92: ...nnection and short circuit Analog power up state PUP command SAFE Command Within 10 ms Analog power up state Single channel playback Multi channel playback No Yes Playback end Playback start Playback start PLAY Command FADR Command START Command Check that the BUSYB of all channels is 1 Check with RDSTAT commands or STATUS1 2 pins 92 116 ...

Page 93: ...Continuous playback flow PLAY START MUON Command Within 10 ms Start continuous playback During playback PLAY START MUON Commands During playback STOP Command End RDSTAT Command No Yes No Read status SI L BUSYB H CBUSYB H Yes tCB3 Wait 93 116 ...

Page 94: ...stop flow Power down flow During loop playback Stop after phrase ends Forced stop Loop stop Loop stop CLOOP command STOP Command Power up state Power down state PDWN Command PLAY START Command Within 10 ms Start loop playback During playback SLOOP command 94 116 ...

Page 95: ...s No Yes No 1st byte of PLAY command Yes No A A RDSTAT Command 1st byte of AMODE command No Yes No 2nd byte of AMODE Command Yes No PDWN Command Yes No Power down state No Yes No Yes CBUSYB H CBUSYB H CBUSYB H CBUSYB H CBUSYB H CBUSYB H Read status SI L BUSYB H CBUSYB H CBUSYB H CBUSYB H CBUSYB H Yes 1st byte of SAFE command No CBUSYB H Yes 2nd byte of PLAY Command No Yes CBUSYB H 95 116 ...

Page 96: ...ODE command 2nd byte of AMODE Command Yes No Command wait state Yes No Check STATUS1 2 pins H Confirm that the SPDERR bit is H ERRCL Command Yes No Clearing the ERR bit STATUS1 2 pins STOP Command Read status SI L Yes No CBUSYB H CBUSYB H CBUSYB H CBUSYB H CBUSYB H Playback end RDSTAT Command No Yes No Read status SI L BUSYB H CBUSYB H Yes 96 116 ...

Page 97: ...mand input Yes No CBUSYB H CBUSYB H STATUS1 2 pins L First command input inputting again No Yes No CBUSYB H Yes First ERRCL command input Yes No STATUS1 2 pins L Second command input inputting again STATUS1 2 pins L End Start Selects the output of misoperation detection and failure detection to the STATUS1 or STATUS2 pin by OUTSTAT command 97 116 ...

Page 98: ...ain No Yes No CBUSYB H Yes First ERRCL command input Yes No STATUS1 2 pins L Second command input inputting again STATUS1 2 pins L First command input 2Byte Second command input 2Byte Yes No Yes No CBUSYB H STATUS1 2 pins L Second ERRCL command input Yes No CBUSYB H First ERRCL command input Yes No STATUS1 2 pins L Start Selects the output of misoperation detection and failure detection to the STA...

Page 99: ...input Yes No STATUS1 2 pins L Second command input inputting again STATUS1 2 pins L First command input 2Byte Second command input 2Byte Yes No Yes No CBUSYB H STATUS1 2 pins L Second ERRCL command input Yes No CBUSYB H First ERRCL command input Yes No STATUS1 2 pins L First command input 3Byte Second command input 3Byte STATUS1 2 pins L No Yes No CBUSYB H Yes Start Selects the output of misoperat...

Page 100: ...s No CBUSYB H CBUSYB H STATUS1 2 pins L First command input inputting again No Yes No CBUSYB H Yes First ERRCL command input Yes No STATUS1 2 pins L Second command input inputting again STATUS1 2 pins L End First read Second read First read Second read Start Selects the output of misoperation detection and failure detection to the STATUS1 or STATUS2 pin by OUTSTAT command 100 116 ...

Page 101: ...ed to select the misoperation detection and failure detection outputs and the STATUS1 or STATUS2 pin is H if all the read data is L the data cannot be read normally Accordingly read the data again First command input End Second command input Yes No CBUSYB H First read Second read Start No Yes Read data All L 101 116 ...

Page 102: ... LSI is divided into the following three power supplies Digital power supply DV DD digital GND DGND Spea ker amplifier power supply SPVDD Speaker amplifier GND SPGND Power supply for flash memory interface IOVDD The DVDD IOVDD SPVDD can be used with a separate power supply When using the same power supply branch it from the root of the power supply for wiring Bypass capacitor To improve noise resi...

Page 103: ...FEDL22660 01 ML22660 Application Circuit I2 C interfaces Please add necessary bypass capacitor to a power supply pin of the serial flash memory separately 103 116 ...

Page 104: ...Rd Ohm Power supply voltage V Temperatures ranges C 4M CSTCR4M00G55B R0 39 2 7 to 5 5 40 to 125 4 096M CSTCR4M09G55B R0 Built in RC4MHz characteristic RC4MHz characteristic is as follows This graph is for reference only and does not guarantee the electrical characteristic Operating temperature O C 4 096 40 0 40 70 105 4 22 3 3 97 3 RC4MHz frequency MHz min 4 31 5 3 89 5 max 104 116 ...

Page 105: ...e is the package heat resistance value θja reference value This value changes the condition of the board size layer number and so on Board θja Ψjc Ψjb Condition JEDEC 4layers 1 W L t 76 2 114 5 1 6 mm 31 58 O C W 0 57 O C W 11 64 O C W Air cooling condition No wind 0m s JEDEC 2layers 2 W L t 76 2 114 5 1 6 mm 37 77 O C W 0 61 O C W 12 43 O C W the soldering area ratio 3 100 1 The wiring density 1s...

Page 106: ...Package This LSI adopts a heat sink type package to raise a radiation of heat characteristic Be sure to design the land pattern corresponding to the heat sink area of the LSI on a board and solder each other The heat sink area of the LSI solder open or GND on the board 106 116 ...

Page 107: ...FEDL22660 01 ML22660 107 116 ...

Page 108: ...ROM function Yes Silence insertion function 20ms to 1024ms 4ms step Repeat function Yes Low pass filter FIR type interpolation filter D A converter Voltage type 16 bit Speaker amplifier Class AB 0 7W 8Ω SPVDD 5V Class AB D 1 0W 8Ω SPVDD 5V Volume Digital 32 levels 128 levels adjustment Analog 50 levels 16 levels function Fade function Yes External analog input Yes Failure detection function Clock ...

Page 109: ...FEDL22660 01 ML22660 It becomes command compatible with ML22460 by using the following command setting Command name Bit name Bit value PUP WCM 0 AMODE HPF 0 109 116 ...

Page 110: ...phrases used Select the number of phrases from the following 4096 3072 2048 1024 Sound ROM information Set any 8 bit data Read by RDVER command Class D amplifier output format Output format selection Half wave mode Full wave mode is not supported WDT counter RST counter WDTERR or RSTERR processing at overflow Select the processing to be performed when an overflow occurs Hold current state Transiti...

Page 111: ...as possible SG pin Connect a capacitor between this pin and SPGND pin SPVDD pin Connect a bypass capacitor between this pin and the SPGND pin RESETB pin At power on input an L level to this pin After the power supply voltage stabilizes set this pin to an H level TEST0 pin Fix to the DGND CBUSYB pin Be sure to input a command with this pin at an H level N C pin Unused pin Leave open Termination of ...

Page 112: ...ter changing to the power down status with PDWN commands Change volume timing by AVOL command Speaker amplifier volume setting by AVOL commands is valid only when Class AB speaker amplifier is used When a Class D speaker amplifier is used the setting value is ignored and 0 0dB is selected Continuous playback timing by PLAY command When making continuous playbacks input the PLAY command for the nex...

Page 113: ...pecify one of the channels for the channel setting CH0 CH3 Do not input it to 0 all 0 with specifying nothing If it is input with specifying nothing all 0 the command is ignored MUON command Set the silence setting M7 M0 to 04h or more tmu 20ms Be sure to specify one of the channels for the channel setting CH0 CH3 Do not input it to 0 all 0 with specifying nothing If it is input with specifying no...

Page 114: ...Coupling capacitor Confirm the recommended values and precautions in this chapter Package Dimensions Confirm Notes for heat sink type Package and Notes for Mounting the Surface Mount Type Package in this chapter Speech LSI Utility Setting Items Confirm setting items of Speech LSI Utility in this chapter 114 116 ...

Page 115: ...FEDL22660 01 ML22660 Revision history Document No Date Page Description Previous edition Current edition FEDL22660 01 2020 4 24 Formal 1st edition 115 116 ...

Page 116: ...iation tolerant 7 For use of our Products in applications requiring a high degree of reliability as exemplified below please contact and consult with a LAPIS Semiconductor representative transportation equipment i e cars ships trains primary communication equipment traffic lights fire crime prevention safety equipment medical systems servers solar cells and power transmission systems 8 Do not use ...

Page 117: ...er Similar products are found below MT3171BE1 SP SM2030 0261 01 2100 0320 02 SP SM2030 0265 004 ZL50232QCG1 ZL38003GMG2 ITM DYPA B 01 ITM DOUF B 01 ITM DOPA B 01 BCM43569PKFFBG CPC5710NTR NAU8401YG BA8206F E2 CPC1465D DS21372T ML22530TBZ0BX ML22Q625 NNNTBZ0BX ML22Q665 NNNTBZ0BX ML22660TBZ0BX ML22620TBZ0BX ML22Q535 NNNTBZ0BX NB4N7132DTG LM567CN NOPB LM567CMX NOPB UCC2750DW UCC3750DW CPC5710N ...

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