AN101
© Kionix 2019 All Rights Reserved
11 July 2019
Page 23 of 27
4.
Timing Requirements
There are several timing requirements that developers should keep in mind when working with
the KX126 accelerometer:
I²C Clock - The I²C Clock can support Fast Mode up to
400 KHz
and High Speed mode up to
3.4
MHz
.
SPI Clock - The SPI Clock can support up to
10 MHz
.
Enable to Valid Outputs (Start-Up Time) - After the part is enabled (PC1 bit in Control Register 1
is asserted), it takes from
2 ms
to
1300 ms
depending on the ODR and Power Mode setting
before the acceleration outputs are valid. (See the relevant
Product Specification for details)
Power-Up Time (Time from VDD and IO_VDD valid to device boot completion) - After a Power-
up, the part takes between
20 ms
to
50 ms
before it is ready for communication.
Software Reset Delay - After a Software Reset, the part takes
2 ms
before it is ready for
communication.
Standby to Operation Delay - Please allow 1.5/ODR delay time when transitioning from stand-by
PC1 = 0 to operating mode PC1 = 1 to allow new settings to load.
