BLOCK DIAGRAM
10 October, 2002
6-2
6.3 BLOCK DIAGRAM
Ho
s
t
(PC
)
DOC
SENS
O
R
LC
D
MI COM
- LCD
Dr
iv
e
- Ke
y
Sca
n
S
CAN
TX
MOT
O
R
CI
S
ARM7T
GE
U
P12
8
4
IT
U
I/
O
I
/F
CACHE (
6
K)
DMAC
PV
C
UART*
2
MEMORY I/F
TX M
O
TOR
DRI
V
E
R
CI
S I
N
TERFA
C
E
PA
RT
KS3
2C6
51
00
RTC
Ba
ck-
up Pa
rt
Aud
io P
a
rt
FLASH
MEMORY
(2
M
B
)
DRAM
(8
M
B
)
MOD
E
M
336
00 bps
EN
G
INE
HVP
S
FAN
SOLENOI
D
MO
T
O
R
OPC_
FUSE
OPC GND
SU
PP
L
Y
DEV
TH
V
TRANSFORM
E
R
600
/6
00
Tx:
Rx
TRANSFORM
E
R
600
/6
00
Tx:
Rx
MO
DEM &
EXT_P
HO
NE
S
EPARA
T
IO
N
PART
E
X
TERNAL
PHONE
DE
T
E
CTI
O
N
PART
EXI
T
SENSOR
+5
V
-5
V
+2
4
V
LI
N
E
EX-
T
E
RNAL
PHONE
MA
IN
LI
U
CENTRO
NI
CS (
IEEE1
284)
UART
OP
E
MHV
SM
PS
H911D900.WMF
